Taiwan semiconductor manufacturing company, ltd. (20240379446). Dual Dopant Source/Drain Regions and Methods of Forming Same simplified abstract

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Dual Dopant Source/Drain Regions and Methods of Forming Same

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Yu-Chang Lin of Hsinchu (TW)

Tien-Shun Chang of New Taipei (TW)

Chun-Feng Nieh of Hsinchu (TW)

Huicheng Chang of Tainan (TW)

Yee-Chia Yeo of Hsinchu (TW)

Dual Dopant Source/Drain Regions and Methods of Forming Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379446 titled 'Dual Dopant Source/Drain Regions and Methods of Forming Same

The method described in the abstract involves the formation of a source/drain region in a semiconductor fin, followed by the implantation of first impurities and then second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. After implanting the second impurities, the source/drain region is annealed.

  • Formation of source/drain region in a semiconductor fin
  • Implantation of first impurities with lower formation enthalpy
  • Implantation of second impurities
  • Annealing of the source/drain region

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication

Problems Solved: - Enhancing the performance of semiconductor devices - Improving the efficiency of integrated circuits

Benefits: - Increased conductivity in source/drain regions - Enhanced overall device performance

Commercial Applications: Title: Advanced Semiconductor Manufacturing Process This technology can be used in the production of high-performance electronic devices, leading to improved market competitiveness and product quality.

Questions about the technology: 1. How does the implantation of impurities affect the conductivity of the source/drain region? 2. What are the advantages of annealing the source/drain region after implanting impurities?


Original Abstract Submitted

a method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. the first impurities have a lower formation enthalpy than the second impurities. the method further includes after implanting the second impurities, annealing the source/drain region.