Taiwan semiconductor manufacturing company, ltd. (20240379422). FIELD EFFECT TRANSISTOR WITH MULTI-METAL GATE VIA AND METHOD simplified abstract

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FIELD EFFECT TRANSISTOR WITH MULTI-METAL GATE VIA AND METHOD

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Sheng-Tsung Wang of Hsinchu (TW)

Lin-Yu Huang of Hsinchu (TW)

Cheng-Chi Chuang of Hsinchu (TW)

Sung-Li Wang of Hsinchu (TW)

Chih-Hao Wang of Hsinchu (TW)

FIELD EFFECT TRANSISTOR WITH MULTI-METAL GATE VIA AND METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379422 titled 'FIELD EFFECT TRANSISTOR WITH MULTI-METAL GATE VIA AND METHOD

The abstract describes a device with a gate structure surrounding a vertical stack of nanostructure semiconductor channels, with a source/drain adjacent to the stack. The device also includes a gate via in contact with the gate structure, consisting of a metal liner layer with lower flowability and a metal fill layer with higher flowability.

  • The device features a gate structure wrapping around nanostructure semiconductor channels.
  • A source/drain is in contact with the nanostructure semiconductor channels.
  • A gate via, with a metal liner layer and a metal fill layer, is in contact with the gate structure.
  • The metal fill layer has higher flowability than the metal liner layer.

Potential Applications: - This technology could be used in advanced semiconductor devices for improved performance. - It may find applications in the development of high-speed and low-power electronic devices.

Problems Solved: - Enhances the efficiency and functionality of semiconductor devices. - Provides a more reliable and stable connection between components.

Benefits: - Improved performance and efficiency in semiconductor devices. - Enhanced reliability and stability in electronic components.

Commercial Applications: - This technology could be valuable in the semiconductor industry for the development of cutting-edge electronic devices with enhanced performance capabilities.

Questions about the technology: 1. How does the metal fill layer with higher flowability contribute to the device's functionality?

  - The metal fill layer with higher flowability allows for better conductivity and improved performance of the device.

2. What advantages does the gate structure wrapping around nanostructure semiconductor channels offer?

  - The gate structure provides better control and efficiency in the operation of the semiconductor device.


Original Abstract Submitted

a device includes a substrate, a gate structure wrapping around a vertical stack of nanostructure semiconductor channels, and a source/drain abutting the vertical stack and in contact with the nanostructure semiconductor channels. the device includes a gate via in contact with the first gate structure. the gate via includes a metal liner layer having a first flowability, and a metal fill layer having a second flowability higher than the first flowability.