Taiwan semiconductor manufacturing company, ltd. (20240379374). SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract

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SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Hung-Pin Chang of New Taipei City (TW)

Tsang-Jiuh Wu of Hsinchu (TW)

Wen-Chih Chiou of Miaoli County (TW)

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379374 titled 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

The manufacturing method of a semiconductor structure involves forming a liner structure on the inner sidewall of a dielectric layer above a semiconductor substrate, creating a via hole in the exposed area of the semiconductor substrate with the liner structure, resulting in an overhang portion with a tapering arc-shaped profile over the via hole, and filling the via hole with a conductive material.

  • Liner structure formed on the inner sidewall of a dielectric layer
  • Creation of a via hole in the semiconductor substrate
  • Formation of an overhang portion with a tapering arc-shaped profile
  • Filling the via hole with a conductive material

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication - Electronics industry

Problems Solved: - Enhancing conductivity in semiconductor structures - Improving the efficiency of via hole filling processes

Benefits: - Increased performance of semiconductor devices - Enhanced reliability of electronic components

Commercial Applications: Title: Advanced Semiconductor Manufacturing Method This technology can be utilized in the production of high-performance electronic devices, leading to improved product quality and efficiency in the semiconductor industry.

Questions about Semiconductor Manufacturing Method: 1. How does the formation of the liner structure impact the overall conductivity of the semiconductor structure? 2. What are the potential challenges associated with filling the via hole with a conductive material in this manufacturing method?


Original Abstract Submitted

a manufacturing method of a semiconductor structure includes: forming a liner structure on an inner sidewall of a dielectric layer overlying a semiconductor substrate; forming a via hole in an area of the semiconductor substrate which is exposed by the liner structure, wherein an overhang portion of the semiconductor substrate having a tapering arc-shaped profile and overhanging the via hole is formed; and filling the via hole with a conductive material.