Taiwan semiconductor manufacturing company, ltd. (20240379366). SEMICONDUCTOR DEVICES simplified abstract

SEMICONDUCTOR DEVICES

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Kuei-Lun Lin of Keelung City (TW)

Chia-Wei Hsu of Taipei City (TW)

Xiong-Fei Yu of Hsinchu (TW)

Chi On Chui of Hsinchu (TW)

Chih-Yu Hsu of Xinfeng Township (TW)

Jian-Hao Chen of Hsinchu (TW)

SEMICONDUCTOR DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379366 titled 'SEMICONDUCTOR DEVICES

The method described in the abstract involves depositing a gate dielectric layer on two fins, then depositing a sacrificial layer on top of the gate dielectric layer. After annealing the gate dielectric layer, the sacrificial layer is removed, and a gate electrode layer is formed.

• Depositing gate dielectric layer on first and second fins
• Depositing sacrificial layer using self-limiting and self-reacting source precursors
• Annealing gate dielectric layer with sacrificial layer in place
• Removing sacrificial layer after annealing
• Forming gate electrode layer on gate dielectric layer

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication - Nanotechnology research

Problems Solved: - Enhancing gate dielectric layer properties - Improving fin-based transistor performance

Benefits: - Increased efficiency in semiconductor devices - Enhanced control over transistor operation

Commercial Applications: Title: Advanced Semiconductor Manufacturing Process This technology could be utilized in the production of high-performance electronic devices, leading to faster and more energy-efficient products. The market implications include improved competitiveness for companies in the semiconductor industry.

Questions about the technology: 1. How does the sacrificial layer impact the performance of the gate dielectric layer? 2. What are the specific advantages of using self-limiting and self-reacting source precursors in this process?

Frequently Updated Research: Researchers are continually exploring new materials and techniques to further optimize the performance of gate dielectric layers in semiconductor devices. Stay updated on the latest advancements in this field to ensure the most cutting-edge technology implementation.

Original Abstract Submitted

in an embodiment, a method includes: depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction; depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer; annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer; after annealing the gate dielectric layer, removing the sacrificial layer; and after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.