Taiwan semiconductor manufacturing company, ltd. (20240379365). METHODS FOR DOPING HIGH-K METAL GATES FOR TUNING THRESHOLD VOLTAGES simplified abstract

METHODS FOR DOPING HIGH-K METAL GATES FOR TUNING THRESHOLD VOLTAGES

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Kuo-Feng Yu of Zhudong Township (TW)

Chun Hsiung Tsai of Xinpu Township (TW)

Jian-Hao Chen of Hsinchu (TW)

Hoong Shing Wong of Hsinchu (TW)

Chih-Yu Hsu of Xinfeng Township (TW)

METHODS FOR DOPING HIGH-K METAL GATES FOR TUNING THRESHOLD VOLTAGES - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379365 titled 'METHODS FOR DOPING HIGH-K METAL GATES FOR TUNING THRESHOLD VOLTAGES

The method described in the patent application involves the formation of gate dielectrics, deposition of a lanthanum-containing layer and a hard mask, as well as an annealing process to drive lanthanum into the gate dielectric.

• Formation of first and second gate dielectrics over semiconductor regions
• Deposition of lanthanum-containing layer with overlapping portions over gate dielectrics
• Deposition of hard mask free from titanium and tantalum over lanthanum-containing layer
• Formation of patterned etching mask to cover part of hard mask
• Removal of exposed portions of hard mask and lanthanum-containing layer
• Annealing process to drive lanthanum into gate dielectric

Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication

Problems Solved: - Enhancing gate dielectric properties - Improving semiconductor device performance

Benefits: - Increased efficiency in semiconductor manufacturing - Enhanced functionality of integrated circuits

Commercial Applications: Title: Advanced Semiconductor Manufacturing Process Description: This technology can be utilized in the production of high-performance semiconductor devices, catering to industries such as electronics, telecommunications, and computing.

Questions about the technology: 1. How does the deposition of lanthanum-containing layers improve gate dielectric properties? 2. What are the advantages of using a hard mask free from titanium and tantalum in this process?

Original Abstract Submitted

a method includes forming a first gate dielectric and a second gate dielectric over a first semiconductor region and a second semiconductor region, respectively, depositing a lanthanum-containing layer including a first portion and a second portion overlapping the first gate dielectric and the second gate dielectric, respectively, and depositing a hard mask including a first portion and a second portion overlapping the first portion and the second portion of the lanthanum-containing layer, respectively. the hard mask is free from both of titanium and tantalum. the method further includes forming a patterned etching mask to cover the first portion of the hard mask, with the second portion of the hard mask being exposed, removing the second portion of the hard mask and the second portion of the lanthanum-containing layer, and performing an anneal to drive lanthanum in the first portion of the lanthanum-containing layer into the first gate dielectric.