Samsung electronics co., ltd. (20240379626). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Seung Hun Shin of Cheonan-si (KR)
Un Byoung Kang of Hwaseong-si (KR)
Yeong Kwon Ko of Hwaseong-si (KR)
Jong Ho Lee of Hwaseong-si (KR)
Teak Hoon Lee of Hwaseong-si (KR)
Jun Yeong Heo of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379626 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation: The semiconductor device described in the patent application consists of two semiconductor chips connected by a connecting terminal and enclosed in an inter-chip molding material.
Key Features and Innovation:
- First semiconductor chip with a through via and a second semiconductor chip with a through via connected by a connecting terminal.
- Inter-chip molding material fills the space between the two chips and encloses the connecting terminal.
- Extension portion of the molding material extends along the side surface of the second semiconductor chip.
- Protruding portion of the molding material protrudes from the extension portion.
Potential Applications: This technology can be used in various electronic devices that require compact and efficient semiconductor chip connections, such as smartphones, tablets, and IoT devices.
Problems Solved: The technology addresses the need for reliable and compact connections between semiconductor chips in electronic devices, improving overall performance and durability.
Benefits:
- Enhanced electrical connectivity between semiconductor chips.
- Improved structural integrity and protection for the connecting terminal.
- Space-saving design for compact electronic devices.
Commercial Applications: The technology can be applied in the manufacturing of consumer electronics, industrial equipment, and automotive systems to improve performance and reliability of semiconductor chip connections.
Questions about Semiconductor Device: 1. How does the inter-chip molding material enhance the connection between the semiconductor chips? 2. What are the potential challenges in implementing this technology in mass production?
Frequently Updated Research: Researchers are continuously exploring new materials and techniques to further improve the efficiency and reliability of semiconductor chip connections in electronic devices. Stay updated on the latest advancements in this field for potential future applications.
Original Abstract Submitted
there is provided a semiconductor device comprising a first semiconductor chip which includes a first chip substrate, and a first through via penetrating the first chip substrate, a second semiconductor chip disposed on the first semiconductor chip, and includes a second chip substrate, and a second through via penetrating the second chip substrate, and a connecting terminal disposed between the first semiconductor chip and the second semiconductor chip to electrically connect the first through via and the second through via. the semiconductor device further comprising an inter-chip molding material which includes a filling portion that fills between the first semiconductor chip and the second semiconductor chip and encloses the connecting terminal, an extension portion that extends along at least a part of a side surface of the second semiconductor chip, and a protruding portion protruding from the extension portion.
