Samsung electronics co., ltd. (20240379515). SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME simplified abstract
Contents
SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Kyoungok Jung of Suwon-si (KR)
Seonghyun Yoo of Suwon-si (KR)
SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240379515 titled 'SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME
The semiconductor package described in the patent application consists of a first semiconductor chip with first pads, a second semiconductor chip with second pads on a surface facing the first chip, through-electrodes connected to the second pads, and a first dielectric layer covering the rear surface of the second chip and part of the through-electrodes, as well as a second dielectric layer surrounding the side surface of the second chip. Bump structures on a planar surface defined by the dielectric layers are electrically connected to the through-electrodes.
- First semiconductor chip with first pads
- Second semiconductor chip with second pads and through-electrodes
- First dielectric layer covering the rear surface of the second chip and part of the through-electrodes
- Second dielectric layer surrounding the side surface of the second chip
- Bump structures on a planar surface defined by the dielectric layers
Potential Applications: - Semiconductor packaging - Integrated circuits - Electronics manufacturing
Problems Solved: - Improved electrical connections - Enhanced thermal management - Increased reliability of semiconductor devices
Benefits: - Higher performance - Better heat dissipation - Longer lifespan of electronic components
Commercial Applications: Title: Advanced Semiconductor Packaging for Enhanced Performance This technology can be utilized in the production of high-performance electronic devices such as smartphones, computers, and automotive systems. It can also benefit industries involved in semiconductor manufacturing and research.
Questions about the technology: 1. How does the use of dielectric layers improve the performance of semiconductor packages? 2. What are the key advantages of having bump structures in the semiconductor package design?
Original Abstract Submitted
a semiconductor package, that includes: a first semiconductor chip including first pads; a second semiconductor chip including second pads on a first surface facing the first semiconductor chip and in contact with the first pads, and including through-electrodes electrically connected to the second pads and extending to a second surface, opposite to the first surface; a first dielectric layer that covers the rear surface of the second semiconductor chip and a portion of each of side surfaces of the through-electrodes thereof; a second dielectric layer that surrounds a side surface of the second semiconductor chip; and bump structures on a planar surface defined by the first dielectric layer and the second dielectric layer, and electrically connected to the through-electrodes, the first dielectric layer may include an inorganic compound, and the second dielectric layer may include an organic-inorganic composite material having a lower coefficient of thermal expansion than the inorganic compound.
