Samsung electronics co., ltd. (20240356559). CONTINUOUS-TIME NOISE-SHAPING SAR ADC WITHOUT EXCESS LOOP DELAY simplified abstract
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CONTINUOUS-TIME NOISE-SHAPING SAR ADC WITHOUT EXCESS LOOP DELAY
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CONTINUOUS-TIME NOISE-SHAPING SAR ADC WITHOUT EXCESS LOOP DELAY - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240356559 titled 'CONTINUOUS-TIME NOISE-SHAPING SAR ADC WITHOUT EXCESS LOOP DELAY
The abstract describes an analog-to-digital converter that quantizes an input signal, generates a residue signal based on the difference between the input signal and a previous digital value, integrates the residue signal, outputs a digital value based on the quantized input signal and integrated residue signal, and applies the previous digital value to generate the residue signal during quantization.
- First input unit quantizes input signal
- Second input unit generates residue signal based on difference between input signal and previous digital value
- Loop filter integrates residue signal
- Comparator outputs digital value based on quantized input signal and integrated residue signal
- Controller applies previous digital value to generate residue signal and controls quantization in a successive approximation scheme
Potential Applications: - Digital signal processing - Communication systems - Sensor networks
Problems Solved: - Efficient analog-to-digital conversion - Minimizing errors in quantization
Benefits: - Improved accuracy in digital conversion - Reduced noise and distortion in signal processing
Commercial Applications: - Consumer electronics - Industrial automation - Telecommunications
Questions about Analog-to-Digital Converter: 1. How does the integrated residue signal improve the accuracy of digital conversion? 2. What are the key differences between this converter and traditional quantization methods?
Frequently Updated Research: - Ongoing studies on optimizing loop filter design for better residue integration.
Original Abstract Submitted
an analog-to-digital converter includes a first input unit configured to quantize an input signal to generate a quantized input signal, a second input unit configured to generate a residue signal corresponding to a difference between the input signal and a previous digital value output during a previous analog-to-digital conversion cycle, a loop filter configured to generate an integrated residue signal, a comparator configured to output a digital value corresponding to the input signal in units of bits based on the quantized input signal and the integrated residue signal, and a controller configured to apply the previous digital value to the second input unit such that the residue signal is generated during quantization of the input signal and to control the first input unit such that the input signal is quantized in a successive approximation scheme based on an output of the comparator.
