Intel corporation (20240355778). EM AND RF MITIGATION SILICON STRUCTURES IN STACKED DIE MICROPROCESSORS FOR DIE TO PLATFORM AND DIE-DIE RF NOISE SUPPRESSION simplified abstract
EM AND RF MITIGATION SILICON STRUCTURES IN STACKED DIE MICROPROCESSORS FOR DIE TO PLATFORM AND DIE-DIE RF NOISE SUPPRESSION
Organization Name
Inventor(s)
Sameer Shekhar of Portland OR (US)
EM AND RF MITIGATION SILICON STRUCTURES IN STACKED DIE MICROPROCESSORS FOR DIE TO PLATFORM AND DIE-DIE RF NOISE SUPPRESSION - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240355778 titled 'EM AND RF MITIGATION SILICON STRUCTURES IN STACKED DIE MICROPROCESSORS FOR DIE TO PLATFORM AND DIE-DIE RF NOISE SUPPRESSION
Simplified Explanation: This patent application describes electronic packages with components such as package substrates, base dies, and chiplets. The base die includes multiple metal layers and integrates a filter within its structure.
Key Features and Innovation:
- Electronic package with package substrate, base die, and chiplets.
- Base die with multiple metal layers and integrated filter.
- Components arranged in a specific configuration for optimal performance.
Potential Applications: This technology can be used in various electronic devices such as smartphones, tablets, and computers. It can also be applied in automotive electronics and industrial equipment.
Problems Solved: This technology addresses the need for efficient and compact electronic packaging solutions. It improves thermal management and signal integrity in electronic devices.
Benefits:
- Enhanced performance and reliability of electronic devices.
- Improved thermal dissipation and signal transmission.
- Compact and cost-effective packaging solution.
Commercial Applications: The technology can be utilized in the consumer electronics industry for developing smaller and more powerful devices. It can also benefit the automotive sector by improving the performance of electronic systems in vehicles.
Questions about Electronic Packages: 1. How does the integration of a filter within the base die improve the performance of electronic packages? 2. What are the potential challenges in implementing this technology in mass-produced electronic devices?
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Original Abstract Submitted
embodiments disclosed herein include electronic packages and their components. in an embodiment, an electronic package comprises a package substrate and a base die over the package substrate. in an embodiment, the electronic package further comprises a plurality of chiplets over the base die. in an embodiment, the base die comprises a substrate, a first metal layer and a second metal layer between the substrate and the plurality of chiplets, and a third metal layer and a fourth metal layer between the package substrate and the substrate. in an embodiment, a filter is integrated into one or more layers of the base die.
