18300421. SELF-ALIGNED CONTACT WITH CT CUT AFTER RMG simplified abstract (International Business Machines Corporation)
Contents
SELF-ALIGNED CONTACT WITH CT CUT AFTER RMG
Organization Name
International Business Machines Corporation
Inventor(s)
Ruilong Xie of Niskayuna NY (US)
Chanro Park of Clifton Park NY (US)
Min Gyu Sung of Latham NY (US)
Julien Frougier of Albany NY (US)
SELF-ALIGNED CONTACT WITH CT CUT AFTER RMG - A simplified explanation of the abstract
This abstract first appeared for US patent application 18300421 titled 'SELF-ALIGNED CONTACT WITH CT CUT AFTER RMG
Simplified Explanation: The patent application describes a method for forming a semiconductor structure by creating gate cut trenches, depositing dielectric materials, and forming source/drain contacts for transistors.
Key Features and Innovation:
- Formation of gate cut trenches in specific regions.
- Deposition of dielectric liner and filler in the trenches.
- Etching of the dielectric liner to expose source/drain regions.
- Deposition of conductive material to form source/drain contacts.
Potential Applications: This technology can be applied in the semiconductor industry for manufacturing advanced transistors and integrated circuits.
Problems Solved: This method addresses the need for precise formation of semiconductor structures with improved performance and reliability.
Benefits:
- Enhanced control over transistor structure.
- Improved electrical properties.
- Increased efficiency in semiconductor manufacturing processes.
Commercial Applications: The technology can be utilized in the production of high-performance electronic devices, leading to advancements in computing, telecommunications, and other industries.
Prior Art: Readers can explore prior patents related to semiconductor structure formation, dielectric materials deposition, and transistor manufacturing processes.
Frequently Updated Research: Stay informed about the latest developments in semiconductor technology, materials science, and nanofabrication techniques relevant to this innovation.
Questions about Semiconductor Structure Formation: 1. How does the method of forming gate cut trenches contribute to the performance of transistors? 2. What are the implications of using dielectric materials in semiconductor structure fabrication?
Original Abstract Submitted
Embodiments of present invention provide a method of forming a semiconductor structure. The method includes forming a gate cut trench in a first region between a first and a second metal gate and in a second region between a first and a second source/drain region of a first and a second transistor respectively; depositing a dielectric liner in the trench lining sidewalls and a bottom of the trench; depositing a dielectric filler inside the trench above the dielectric liner, the dielectric liner thereby surrounding a bottom and sidewalls of the dielectric filler; depositing a dielectric cap covering the dielectric liner in the first region; etching the dielectric liner in the second region to create an opening exposing the source/drain region of the first transistor; and depositing a conductive material in the opening to form a source/drain contact of the first transistor. A structure formed thereby is also provided.
