18751359. PACKAGE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

PACKAGE

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Ming-Fa Chen of Taichung City (TW)

Chao-Wen Shih of Hsinchu County (TW)

Hsien-Wei Chen of Hsinchu City (TW)

Sung-Feng Yeh of Taipei City (TW)

Tzuan-Horng Liu of Taoyuan City (TW)

PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18751359 titled 'PACKAGE

Simplified Explanation: The patent application describes a package consisting of a carrier substrate, a first die, and a second die stacked in sequential order on the carrier substrate. The first die includes a first bonding layer, a second bonding layer, and an alignment mark embedded in the first bonding layer. The second die includes a third bonding layer, with the rear surface of the first die in contact with the carrier substrate and the active surface of the first die in contact with the third bonding layer of the second die.

Key Features and Innovation:

• Package design with stacked dies on a carrier substrate.
• First die with two bonding layers and an alignment mark.
• Second die with a bonding layer for connection to the first die.
• Physical contact between the rear surface of the first die and the carrier substrate.
• Physical contact between the active surface of the first die and the third bonding layer of the second die.

Potential Applications: This technology can be applied in semiconductor packaging, integrated circuits, microelectronics, and electronic devices requiring compact and efficient die stacking.

Problems Solved:

• Facilitates the stacking of multiple dies in a compact space.
• Ensures proper alignment and connection between stacked dies.
• Enhances the overall performance and functionality of electronic devices.

Benefits:

• Improved efficiency in die stacking processes.
• Enhanced reliability and durability of electronic components.
• Enables the development of smaller and more advanced electronic devices.

Commercial Applications: Potential commercial applications include the manufacturing of smartphones, tablets, wearables, IoT devices, and other consumer electronics that require compact and high-performance semiconductor packaging solutions.

Prior Art: Readers can explore prior art related to die stacking, semiconductor packaging, and microelectronics to gain a deeper understanding of the technological advancements in this field.

Frequently Updated Research: Stay updated on the latest research in semiconductor packaging, die stacking techniques, and advancements in microelectronics to leverage the most current innovations in the industry.

Questions about Die Stacking: 1. How does die stacking contribute to the miniaturization of electronic devices? 2. What are the key challenges in achieving efficient die stacking processes in semiconductor packaging?

Original Abstract Submitted

A package includes a carrier substrate, a first die, and a second die. The first die and the second die are stacked on the carrier substrate in sequential order. The first die includes a first bonding layer, a second bonding layer, and an alignment mark embedded in the first bonding layer. The second die includes a third bonding layer. A surface of the first bonding layer form a rear surface of the first die and a surface of the second bonding layer form an active surface of the first die. The rear surface of the first die is in physical contact with the carrier substrate. The active surface of the first die is in physical contact with the third bonding layer of the second die.