18630122. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18630122 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the abstract consists of a redistribution substrate with multiple redistribution layers, an upper and lower redistribution layer, a first pad structure, a second pad structure, a through-via for electrical connection, and a semiconductor chip.
- The innovation involves a complex redistribution substrate design with multiple layers for efficient electrical connections.
- The through-via allows for seamless electrical connection between the second pad structure and the redistribution layers.
- The upper redistribution layer includes various portions for different functions, such as pad connections and through-hole extensions.
- The lower redistribution layer complements the upper layer with its own pattern and pad portions for enhanced connectivity.
- The second pad structure is designed with a through-hole for the through-via to pass through, ensuring proper electrical connections.
Potential Applications: - This technology can be applied in advanced semiconductor packaging for various electronic devices. - It can improve the performance and reliability of integrated circuits in high-tech applications.
Problems Solved: - Enhances electrical connectivity in semiconductor packages. - Facilitates efficient signal transmission between different components.
Benefits: - Improved performance and reliability of electronic devices. - Enhanced electrical connections for better functionality.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Connectivity This technology can be utilized in the manufacturing of smartphones, laptops, and other electronic devices requiring high-performance integrated circuits.
Questions about Semiconductor Packaging Technology: 1. How does the through-via contribute to the efficiency of electrical connections in the semiconductor package? 2. What are the specific advantages of using a complex redistribution substrate design in semiconductor packaging?
Original Abstract Submitted
A semiconductor package includes a redistribution substrate including a plurality of redistribution layers in an insulating layer and including an upper redistribution and a lower redistribution layer, a first pad structure; a second pad structure on the redistribution substrate and connected to the upper redistribution layer; a through-via extending to electrically connect the second pad structure and the plurality of redistribution layers; and a semiconductor chip, wherein the upper redistribution layer includes an upper pattern portion, a first upper pad portion connected to the first pad structure, and a second pad portion having an upper hole through which the through-via extends, the lower redistribution layer includes a lower pattern portion and a lower pad portion on at least one end of the lower pattern portion and having a lower hole through which the through-via extends, and the second pad structure includes a through-hole through which the through-via extends.
