18604411. BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
Contents
BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE
Organization Name
Inventor(s)
Violante Moschiano of Avezzano (IT)
Shyam Sunder Raghunathan of Singapore (SG)
BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18604411 titled 'BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE
The abstract describes a patent application for control logic in a memory device that initiates a program operation on a memory array with top and bottom decks.
- During the seeding phase of the program operation, the control logic applies a first positive voltage to wordlines associated with memory cells in the bottom deck that are in a programmed state, and a ground voltage to wordlines associated with memory cells in the top deck.
- At the end of the seeding phase, the control logic electrically separates the top deck from the bottom deck and applies a program voltage to a selected wordline during the inhibit phase of the program operation, which is associated with memory cells in the top deck.
Potential Applications: - This technology can be used in various memory devices such as flash memory, non-volatile memory, and other types of memory arrays. - It can enhance the efficiency and performance of memory operations in electronic devices.
Problems Solved: - Efficiently programming memory cells in a memory array with top and bottom decks. - Improving the reliability and speed of program operations in memory devices.
Benefits: - Enhanced programming efficiency and reliability. - Improved performance of memory operations. - Increased speed and accuracy in memory programming.
Commercial Applications: - This technology can be applied in the development of faster and more reliable memory devices for consumer electronics, data storage systems, and other electronic devices.
Questions about the technology: 1. How does the control logic in this memory device improve the programming efficiency of memory cells? 2. What are the potential implications of separating the top deck from the bottom deck during the program operation?
Original Abstract Submitted
Control logic in a memory device initiates a program operation on a memory array comprising a top deck and bottom deck. During a seeding phase of the program operation, the control logic causes a first positive voltage to be applied to a first plurality of wordlines of the memory array, wherein the first plurality of wordlines is associated with memory cells in the bottom deck of the memory array that are in a programmed state, and causes a ground voltage to be applied to a second plurality of wordlines of the memory array, wherein the second plurality of wordlines is associated with memory cells in the top deck of the memory array. At an end of the seeding phase of the program operation, the control logic electrically separates the top deck from the bottom deck and causes a program voltage to be applied to a selected wordline of the memory array during an inhibit phase of the program operation, wherein the selected wordline is associated with respective memory cells in the top deck of the memory array.
