18625800. CONTROLLING PILLAR VOLTAGE USING WORDLINE BOOST VOLTAGE AND SELECT GATE LEAKAGE DURING ALL LEVELS PROGRAMMING OF A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
CONTROLLING PILLAR VOLTAGE USING WORDLINE BOOST VOLTAGE AND SELECT GATE LEAKAGE DURING ALL LEVELS PROGRAMMING OF A MEMORY DEVICE
Organization Name
Inventor(s)
Sheyang Ning of San Jose CA (US)
Lawrence Celso Miranda of San Jose CA (US)
Jeffrey S. Mcneil of Nampa ID (US)
Tomoko Ogura Iwasaki of San Jose CA (US)
Yeang Meng Hern of Singapore (SG)
Lee-eun Yu of San Jose CA (US)
Albert Fayrushin of Boise ID (US)
CONTROLLING PILLAR VOLTAGE USING WORDLINE BOOST VOLTAGE AND SELECT GATE LEAKAGE DURING ALL LEVELS PROGRAMMING OF A MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18625800 titled 'CONTROLLING PILLAR VOLTAGE USING WORDLINE BOOST VOLTAGE AND SELECT GATE LEAKAGE DURING ALL LEVELS PROGRAMMING OF A MEMORY DEVICE
The abstract of this patent application describes a control logic system in a memory device that initiates a program operation involving two phases: a first phase where a ramping voltage level is applied to wordlines to boost pillar voltages, and a second phase where programming pulses are applied to program memory cells to specific levels. Additionally, the voltage applied to a drain-side select line is adjusted during the first phase.
- The control logic system in a memory device initiates a program operation with two distinct phases.
- In the first phase, a ramping voltage level is applied to wordlines to boost pillar voltages.
- The second phase involves applying programming pulses to program memory cells to specific levels.
- During the first phase, the voltage applied to a drain-side select line is adjusted from a first to a second level.
Potential Applications: - This technology can be applied in various types of memory devices such as NAND flash memory. - It can be used in solid-state drives (SSDs) to enhance programming efficiency and reliability.
Problems Solved: - Improves the efficiency and reliability of programming memory cells in memory devices. - Enhances the overall performance of memory devices by optimizing the programming process.
Benefits: - Faster and more reliable programming of memory cells. - Improved performance and longevity of memory devices. - Enhanced data storage capabilities in NAND flash memory and SSDs.
Commercial Applications: Title: Enhanced Programming Logic for Memory Devices This technology can be commercially utilized in the production of high-performance SSDs for consumer electronics, data centers, and enterprise storage solutions. The improved programming efficiency and reliability can lead to faster data access speeds and increased storage capacities, making it a valuable innovation in the memory device industry.
Questions about Enhanced Programming Logic for Memory Devices: 1. How does the adjustment of the drain-side select line voltage impact the programming process in memory devices? 2. What are the potential implications of this technology on the development of next-generation memory devices?
Original Abstract Submitted
Control logic in a memory device initiates a program operation including a first phase including applying a ramping voltage level to a set of wordlines of a memory device to boost a set of pillar voltages and a second phase including applying a set of programming pulses to a wordline associated with one or more memory cells of the memory device to be programmed to a set of programming levels, wherein each programming level of the set of programming levels is programmed by each programming pulse. During the first phase of the program operation, a first voltage applied to a drain-side select line (SGD) is adjusted from a first SGD voltage level to a second SGD voltage level.
- Micron Technology, Inc.
- Sheyang Ning of San Jose CA (US)
- Lawrence Celso Miranda of San Jose CA (US)
- Jeffrey S. Mcneil of Nampa ID (US)
- Tomoko Ogura Iwasaki of San Jose CA (US)
- Yeang Meng Hern of Singapore (SG)
- Lee-eun Yu of San Jose CA (US)
- Albert Fayrushin of Boise ID (US)
- Fulvio Rori of Boise ID (US)
- Justin Bates of Boise ID (US)
- G11C16/08
- G11C16/04
- G11C16/10
- CPC G11C16/08