18527367. MEMORY DEVICE INCLUDING ROW-HAMMER CELLS AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)
Contents
MEMORY DEVICE INCLUDING ROW-HAMMER CELLS AND OPERATING METHOD THEREOF
Organization Name
Inventor(s)
Saeng Hwan Kim of Gyeonggi-do (KR)
MEMORY DEVICE INCLUDING ROW-HAMMER CELLS AND OPERATING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18527367 titled 'MEMORY DEVICE INCLUDING ROW-HAMMER CELLS AND OPERATING METHOD THEREOF
The memory device described in the patent application includes a memory cell array with row-hammer cells that track accesses to rows, an address control circuit that generates consecutive refresh addresses, and a refresh control circuit that selectively initializes row-hammer cells while refreshing rows.
- Memory device with row-hammer cells to store accesses of rows
- Address control circuit generates first and second refresh addresses
- First refresh address indicates odd-numbered row during first refresh cycle and even-numbered row during second refresh cycle
- Refresh control circuit refreshes first and second rows corresponding to refresh addresses
- Refresh control circuit selectively initializes row-hammer cells of first row during refresh
Potential Applications: - Data centers - High-performance computing systems - Mobile devices - Embedded systems - Gaming consoles
Problems Solved: - Preventing data corruption due to row-hammer effect - Enhancing memory reliability - Improving system performance
Benefits: - Increased data integrity - Enhanced system stability - Extended memory lifespan
Commercial Applications: Title: "Enhanced Memory Device for Improved Data Integrity" This technology can be used in various commercial applications such as data centers, high-performance computing systems, and mobile devices to ensure data integrity and system stability, ultimately improving overall performance and reliability in these industries.
Questions about the technology: 1. How does the memory device prevent data corruption caused by the row-hammer effect? 2. What are the key advantages of selectively initializing row-hammer cells during the refresh process?
Original Abstract Submitted
A memory device includes a memory cell array including row-hammer cells configured to store a number of accesses of a corresponding row of a plurality of rows; an address control circuit configured to generate consecutive first and second refresh addresses according to a normal refresh command, wherein the first refresh address indicates an odd-numbered row during a first refresh cycle and an even-numbered row during a second refresh cycle; and a refresh control circuit configured to refresh, according to the normal refresh command, first and second rows respectively corresponding to the first and second refresh addresses and selectively initialize the row-hammer cells of the first row while refreshing the first row.
