Tokyo Electron Limited patent applications on October 10th, 2024
Patent Applications by Tokyo Electron Limited on October 10th, 2024
Tokyo Electron Limited: 15 patent applications
Tokyo Electron Limited has applied for patents in the areas of H01J37/32 (8), H01L21/67 (2), H01L21/02 (2), H01L21/311 (1), H01L29/66 (1) B23K37/04 (1), C23C16/509 (1), G06T7/0004 (1), H01J37/32183 (1), H01J37/32247 (1)
With keywords such as: substrate, processing, configured, chamber, surface, having, support, plasma, supply, and dielectric in patent application abstracts.
Patent Applications by Tokyo Electron Limited
20240335913. BONDING APPARATUS AND BONDING METHOD_simplified_abstract_(tokyo electron limited)
Inventor(s): Tetsuya Maki of Koshi City (JP) for tokyo electron limited
IPC Code(s): B23K37/04, B23K31/12
CPC Code(s): B23K37/04
Abstract: a bonding apparatus includes a first holder configured to attract and hold a first substrate from above; a second holder located lower than the first holder and configured to attract and hold a second substrate from below; a moving mechanism configured to allow a first one of the first holder and the second holder to approach a second one of the first holder and the second holder; a rough adjustment device configured to roughly adjust a position in a rotational direction of the first substrate before the first substrate is attracted and held by the first holder; a fine adjustment device, including at least one first driver configured to rotate the first holder by displacing a piezoelectric element, configured to finely adjust, with the at least one first driver, the position in the rotational direction of the first substrate attracted and held by the first holder.
Inventor(s): Kensaku NARUSHIMA of Nirasaki City (JP) for tokyo electron limited, Takashi KOBAYASHI of Nirasaki City (JP) for tokyo electron limited, Shinya OKABE of Nirasaki City (JP) for tokyo electron limited, Takashi SAKUMA of Nirasaki City (JP) for tokyo electron limited, Kunihiro TADA of Nirasaki City (JP) for tokyo electron limited, Satoshi YOSHIDA of Nirasaki City (JP) for tokyo electron limited
IPC Code(s): C23C16/509, C23C16/14, C23C16/44, C23C16/455, C23C16/46
CPC Code(s): C23C16/509
Abstract: a film forming apparatus, including a processing container, an interior of which is configured to be depressurized, an electrode configured to generate an electric field in a processing space inside the processing container, a radio frequency power supply configured to supply radio frequency power to the electrode, a stage arranged in the processing container to place a substrate thereon, and a film forming gas introduction part configured to introduce vaporized zirconium chloride into the processing space. the film forming gas introduction part is made of a metal and is grounded.
Inventor(s): Toyohisa TSURUDA of Koshi City (JP) for tokyo electron limited, Masato HOSAKA of Koshi City (JP) for tokyo electron limited
IPC Code(s): G06T7/00, G06T7/50, G06T7/90
CPC Code(s): G06T7/0004
Abstract: a device for creating a shape characteristic value estimation model for estimating a shape characteristic value includes: a post-processing-image acquisition part for acquiring a post-processing image of a surface of a substrate subjected to film processing; a pre-processing-image acquisition part for acquiring a pre-processing image of the surface not subjected to the film processing; a color-change estimation model creation part for creating a color-change estimation model for estimating first color-related information of the surface of the substrate included in the post-processing image from second color-related information of the surface of the substrate included in the pre-processing image; and a correlation estimation model creation part for creating a correlation estimation model by obtaining a difference between the first information and a result estimated by the color-change estimation model, the correlation estimation model being used for estimating correlation between the difference and the shape characteristic value.
Inventor(s): Qiang Wang of Austin TX (US) for tokyo electron limited, Peter Lowell George Ventzek of Austin TX (US) for tokyo electron limited, Shyam Sridhar of Austin TX (US) for tokyo electron limited, Mitsunori Ohata of Taiwa-cho (JP) for tokyo electron limited
IPC Code(s): H01J37/32, H03H7/38
CPC Code(s): H01J37/32183
Abstract: an embodiment matching circuit for a plasma tool includes an impedance matching network configured to be coupled between a power supply and an antenna of a plasma chamber. the power supply is configured to provide power to and excite the antenna at a first frequency to generate a plasma. the impedance matching network is configured such that, during operation of the plasma chamber at the first frequency, a phase angle between a voltage and a current in the impedance matching network is matched to be 0�, and an impedance of the impedance matching network and the plasma chamber equals an impedance of the power supply. the impedance matching network includes a first adjustable reactive component; and a first fixed-length transmission line coupled between the first adjustable reactive component and an input of the antenna.
20240339300. Plasma Processing Apparatus_simplified_abstract_(tokyo electron limited)
Inventor(s): Kazushi KANEKO of Yamanashi (JP) for tokyo electron limited, Osamu SAKAI of Shiga (JP) for tokyo electron limited
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32247
Abstract: a plasma processing apparatus comprises a processing chamber having a processing space, an electromagnetic wave generator configured to generate electromagnetic waves for plasma excitation to be supplied to the processing space, a dielectric having a first surface facing the processing space, an electromagnetic wave supply configured to supply the electromagnetic waves to the processing space via the dielectric, and a resonator array structure disposed along the first surface of the dielectric in the processing chamber. the resonator array structure includes a plurality of resonators resonating with magnetic field components of the electromagnetic waves, having a size smaller than a wavelength of the electromagnetic waves, and arranged in a direction along the first surface of the dielectric. the electromagnetic wave supply is configured to supply magnetic field components perpendicular to a plane on which the plurality of resonators are arranged.
Inventor(s): Shin YAMAGUCHI of Miyagi (JP) for tokyo electron limited, Daiki SATOH of Miyagi (JP) for tokyo electron limited, Takashi KANAZAWA of Miyagi (JP) for tokyo electron limited, Makoto KATO of Miyagi (JP) for tokyo electron limited
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32568
Abstract: a substrate support comprises an electrostatic chuck configured to support a substrate and an edge ring and a base configured to support the electrostatic chuck. the electrostatic chuck includes a first region having a first upper surface and configured to support a substrate placed on the first upper surface, a second region having a second upper surface and configured to support an edge ring placed on the second upper surface, a first electrode disposed in the first region and to which a dc voltage is applied, a second electrode disposed below the first electrode and to which a first bias power is supplied, a third electrode disposed below the second electrode and to which the first bias power is supplied and a first gas supply line disposed between the second electrode and the third electrode.
Inventor(s): Kazushi Kaneko of Yamanashi (JP) for tokyo electron limited, Satoru Kawakami of Yamanashi (JP) for tokyo electron limited, Yuki Osada of Yamanashi (JP) for tokyo electron limited
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32669
Abstract: there is a plasma processing apparatus comprising: a processing chamber having a processing space; an electromagnetic wave generator configured to generate electromagnetic waves for plasma excitation; a dielectric having a first surface; an electromagnetic wave supply part configured to supply the electromagnetic waves to the processing space via the dielectric; and a resonator array structure disposed along the first surface of the dielectric, wherein the resonator array structure includes a plurality of resonators, each resonator having a structure in which a conductive member is laminated on one surface of a dielectric plate, having a first resonance frequency, capable of resonating with magnetic field components of the electromagnetic waves and having a size smaller than a wavelength of the electromagnetic waves, and the resonator array structure is configured to form cells surrounded by the resonators, and the cells include the resonators having different first resonance frequencies between the cells.
Inventor(s): Hajime TAMURA of Miyagi (JP) for tokyo electron limited
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32724
Abstract: a substrate support and a plasma processing apparatus for placing an edge ring on an electrostatic chuck with high positional accuracy. a substrate support includes: a base, a first electrostatic chuck region disposed at an upper portion of the base and having a substrate support surface, and the first electrostatic chuck holding a substrate on the substrate support surface; and a second electrostatic chuck region disposed at the upper portion of the base to surround the first electrostatic chuck region and having a ring support surface, and the second electrostatic chuck holding an edge ring on the ring support surface. the second electrostatic chuck region is provided with a positioning pin of the edge ring, the positioning pin being formed of a material having a linear expansion coefficient substantially equal to a linear expansion coefficient of a material forming the second electrostatic chuck region.
Inventor(s): Atsushi SAWACHI of Miyagi (JP) for tokyo electron limited, Jun HIROSE of Miyagi (JP) for tokyo electron limited, Takuya NISHIJIMA of Miyagi (JP) for tokyo electron limited, Ichiro SONE of Miyagi (JP) for tokyo electron limited, Suguru SATO of Miyagi (JP) for tokyo electron limited
IPC Code(s): H01J37/32
CPC Code(s): H01J37/32733
Abstract: a substrate processing apparatus is provided. the substrate processing apparatus comprise: a first chamber including a sidewall providing an opening, the first chamber further including a movable part movable upward and downward within the first chamber; a substrate support disposed within the first chamber; a second chamber disposed within the first chamber and defining, together with the substrate support, a processing space in which a substrate mounted on the substrate support is processed, the second chamber being separable from the first chamber and transportable between an inner space of the first chamber and the outside of the first chamber via the opening; a clamp releasably fixing the second chamber to the movable part extending above the second chamber; a release mechanism configured to release the fixing of the second chamber by the clamp; and a lift mechanism configured to move the movable part upward and downward.
Inventor(s): Yuya MINOURA of Miyagi (JP) for tokyo electron limited, Takayuki SUZUKI of Miyagi (JP) for tokyo electron limited, Takahiro MURAKAMI of Miyagi (JP) for tokyo electron limited
IPC Code(s): H01J37/32, H01L21/67
CPC Code(s): H01J37/3288
Abstract: a method of performing maintenance on a substrate processing apparatus is provided. the substrate processing apparatus includes a chamber and a gas supplier configured to supply a processing gas to an interior of the chamber. the method includes (a) supplying a first processing gas from the gas supplier to the interior of the chamber, and forming a protective film on a surface of a member in the interior of the chamber, and (b) after (a), exposing the interior of the chamber to an ambient environment and performing the maintenance on the substrate processing apparatus.
20240339309. Advanced OES Characterization_simplified_abstract_(tokyo electron limited)
Inventor(s): Sergey Voronin of Albany NY (US) for tokyo electron limited, Francisco Machuca of Fremont CA (US) for tokyo electron limited, Blaze Messer of Albany NY (US) for tokyo electron limited, Yan Chen of Fremont CA (US) for tokyo electron limited, Ying Zhu of Fremont CA (US) for tokyo electron limited, Mihail Mihaylov of Fremont CA (US) for tokyo electron limited, Joel Ng of Fremont CA (US) for tokyo electron limited, Ashawaraya Shalini of Fremont CA (US) for tokyo electron limited, Da Song of Albany NY (US) for tokyo electron limited, Akiteru Ko of Albany NY (US) for tokyo electron limited
IPC Code(s): H01J37/32, H01J37/18
CPC Code(s): H01J37/32972
Abstract: a processing system that includes: a processing chamber configured to hold a substrate to be processed; a first vacuum pump; a second vacuum pump disposed downstream from the first vacuum pump; an exhaust gas line connecting the process chamber and the first vacuum pump, and the first vacuum pump and the second vacuum pump; a plasma power supply including a first rf power source configured to generate a plasma from a portion of an exhaust gas between the first and second vacuum pumps; and an optical emission spectroscopy (oes) measurement assembly including an oes detector configured to measure oes signals from the plasma.
20240339328. MULTI LEVEL CONTACT ETCH_simplified_abstract_(tokyo electron limited)
Inventor(s): Alec Dorfner of Miyagi (JP) for tokyo electron limited, Minjoon Park of Albany NY (US) for tokyo electron limited
IPC Code(s): H01L21/311, H01L21/02, H01L21/033, H01L21/3105, H01L21/768
CPC Code(s): H01L21/31116
Abstract: a method of processing a substrate that includes: forming a conformal etch stop layer (esl) over a staircase pattern of the substrate, the staircase pattern including staircases, each of the staircases including a conductive surface; forming a dielectric layer over the esl; planarizing a top surface of the dielectric layer; forming a patterned hardmask over the dielectric layer; and etching the dielectric layer selectively to the esl using the patterned hardmask as an etch mask to form a plurality of recesses, each of the plurality of recesses landing on each of the staircases, the esl protecting the conductive surface from the etching, the etching including exposing the substrate to a plasma generated from a process gas including a fluorocarbon, o, and wf, a flow rate of wfbeing between 0.01% and 1% of a total gas flow rate of the process gas.
Inventor(s): Shota Umezaki of Koshi City (JP) for tokyo electron limited, Hiroaki Inadomi of Koshi City (JP) for tokyo electron limited
IPC Code(s): H01L21/67, H01L21/02, H01L21/673, H01L21/677
CPC Code(s): H01L21/67034
Abstract: a substrate processing apparatus includes a transfer block in which a transfer device configured to transfer a substrate is placed, and a processing block provided adjacent to the transfer block. the processing block includes a liquid film forming unit configured to form a liquid film on a top surface of the substrate which is held horizontally, and a drying unit configured to replace the liquid film with a supercritical fluid to dry the substrate. the drying unit includes a pressure vessel having therein a drying chamber for the substrate, a cover body configured to close an opening of the drying chamber, and a supporting body configured to support the substrate horizontally in the drying chamber. the supporting body is fixed to the drying chamber. the transfer device advances into the drying chamber through the opening of the drying chamber while holding horizontally the substrate having the liquid film thereon.
20240339431. BONDING METHOD AND BONDING SYSTEM_simplified_abstract_(tokyo electron limited)
Inventor(s): Kazutaka Noda of Koshi City (JP) for tokyo electron limited, Atsushi Nagata of Koshi City (JP) for tokyo electron limited, Takashi Terada of Koshi City (JP) for tokyo electron limited
IPC Code(s): H01L23/00
CPC Code(s): H01L24/80
Abstract: a bonding method of bonding substrates, a metal material being exposed on each of the substrates, is provided. the bonding method includes modifying a surface of each of the substrates to be bonded with a plasma of a processing gas; hydrophilizing the modified surface of each of the substrates; and bonding the hydrophilized surfaces of the substrates. in the hydrophilizing of the modified surface, a processing liquid is supplied to the surface of each of the substrates, and a recess amount of the metal material is controlled with the processing liquid.
Inventor(s): Mark I. Gardner of Cedar Creek TX (US) for tokyo electron limited, H. Jim Fulford of Marianna FL (US) for tokyo electron limited
IPC Code(s): H10B51/30, H01L29/66, H01L29/78
CPC Code(s): H10B51/30
Abstract: methods and devices are described for electronic devices, such as memory elements. in some implementations, the device may include a first layer including a source region, a drain region and a channel between the source region and drain region, the source and drain being in the same or different plane than at least a portion of the channel. in addition, the device may include a gate dielectric on the first layer and in contact with the channel, a first conductor on the gate dielectric, a ferroelectric layer on the first conductor, and a second conductor material on the ferroelectric layer. the gate structure may be utilized as a storage capacitor for a memory element.
Tokyo Electron Limited patent applications on October 10th, 2024
- Tokyo Electron Limited
- B23K37/04
- B23K31/12
- CPC B23K37/04
- Tokyo electron limited
- C23C16/509
- C23C16/14
- C23C16/44
- C23C16/455
- C23C16/46
- CPC C23C16/509
- G06T7/00
- G06T7/50
- G06T7/90
- CPC G06T7/0004
- H01J37/32
- H03H7/38
- CPC H01J37/32183
- CPC H01J37/32247
- CPC H01J37/32568
- CPC H01J37/32669
- CPC H01J37/32724
- CPC H01J37/32733
- H01L21/67
- CPC H01J37/3288
- H01J37/18
- CPC H01J37/32972
- H01L21/311
- H01L21/02
- H01L21/033
- H01L21/3105
- H01L21/768
- CPC H01L21/31116
- H01L21/673
- H01L21/677
- CPC H01L21/67034
- H01L23/00
- CPC H01L24/80
- H10B51/30
- H01L29/66
- H01L29/78
- CPC H10B51/30
