Samsung electronics co., ltd. (20240347524). SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Jangseok Choi of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240347524 titled 'SEMICONDUCTOR PACKAGE
The abstract of this patent application describes a semiconductor package with multiple memory dies stacked on a package substrate in a specific configuration.
- The package includes a package substrate and three memory dies stacked in a vertical direction on the substrate.
- The first and second memory dies are attached without bumps, while the second and third memory dies are attached with multiple bumps.
- The memory dies are arranged perpendicular to the upper surface of the package substrate.
Potential Applications: This technology could be used in various electronic devices requiring high-density memory storage, such as smartphones, tablets, and laptops.
Problems Solved: This innovation addresses the need for compact and efficient memory storage solutions in semiconductor packaging.
Benefits: The stacked configuration of memory dies allows for increased memory capacity in a smaller footprint, improving the overall performance of electronic devices.
Commercial Applications: This technology has significant commercial potential in the consumer electronics market, where compact and high-capacity memory solutions are in high demand.
Questions about the technology: 1. How does the absence of bumps between the first and second memory dies affect the overall performance of the semiconductor package? 2. What advantages do the multiple bumps between the second and third memory dies provide in terms of connectivity and stability?
Original Abstract Submitted
a semiconductor package according to an example embodiment of the present disclosure includes: a package substrate; and first to third memory dies disposed on the package substrate and sequentially stacked in a first direction, perpendicular to an upper surface of the package substrate, and the first memory die and the second memory die are attached to each other without a bump, and the second memory die and the third memory die are attached to each other by a plurality of bumps.
