Taiwan semiconductor manufacturing company, ltd. (20240341073). Vertical Static Random Access Memory and Method of Fabricating Thereof simplified abstract
Contents
Vertical Static Random Access Memory and Method of Fabricating Thereof
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
Chih-Chuan Yang of Hsinchu (TW)
Kuo-Hsiu Hsu of Taoyuan County (TW)
Chia-Hao Pao of Kaohsiung City (TW)
Vertical Static Random Access Memory and Method of Fabricating Thereof - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240341073 titled 'Vertical Static Random Access Memory and Method of Fabricating Thereof
The abstract describes a novel four times contacted poly pitch (4CPP) static random-access memory (SRAM) cell layout that enhances memory performance and facilitates scaling for advanced IC technology nodes.
- The layout forms six SRAM transistors from one OD region and four poly lines on the frontside of a substrate.
- It provides a double-sided routing structure for word lines, bit lines, and/or voltage lines, minimizing line capacitance and resistance.
- A vertical SRAM design is disclosed, stacking transistors vertically to improve memory performance and scalability.
- The vertical SRAM includes a double-sided routing structure for efficient placement of lines in backside metal one (M1) and/or frontside M1 layers.
- This innovative layout addresses the need for advanced scaling in IC technology while optimizing memory performance.
Potential Applications: - Advanced IC technology nodes - Memory-intensive applications in computing devices - High-performance computing systems
Problems Solved: - Line capacitance and resistance in SRAM cells - Scaling challenges in IC technology - Memory performance limitations
Benefits: - Improved memory performance - Enhanced scalability for advanced IC technology nodes - Minimized line capacitance and resistance
Commercial Applications: Title: "Innovative SRAM Cell Layout for Advanced IC Technology" This technology can be utilized in various commercial applications such as: - High-performance computing systems - Data centers - Mobile devices
Questions about the technology: 1. How does the 4CPP layout improve memory performance compared to traditional SRAM cell layouts? - The 4CPP layout optimizes the placement of word lines, bit lines, and voltage lines to minimize line capacitance and resistance, enhancing memory performance. 2. What are the key advantages of the vertical SRAM design in terms of scalability and memory performance? - The vertical SRAM design allows for the stacking of transistors vertically, facilitating scaling for advanced IC technology nodes and improving memory performance.
Original Abstract Submitted
a four times contacted poly pitch (4cpp) static random-access memory (sram) cell layout is disclosed that forms six sram transistors from one od region and four poly lines at a frontside of a substrate and provides a double-sided routing structure for word lines, bit lines, and/or voltage lines. for example, a vertical sram is disclosed that stacks transistors, vertically, to facilitate scaling needed for advanced ic technology nodes and improve memory performance. the vertical sram further includes a double-sided routing structure, which facilitates placement of bit lines, word lines, and voltage lines in a backside metal one (m1) layer and/or a frontside m1 layer to minimize line capacitance and line resistance.
