Samsung electronics co., ltd. (20240339540). SEMICONDUCTOR DEVICE simplified abstract

SEMICONDUCTOR DEVICE

Organization Name

samsung electronics co., ltd.

Inventor(s)

Beom Jin Kim of Suwon-si (KR)

Guk Hee Kim of Suwon-si (KR)

Young Woo Kim of Suwon-si (KR)

Jun Soo Kim of Suwon-si (KR)

Sang Cheol Na of Suwon-si (KR)

Kyoung Woo Lee of Suwon-si (KR)

Anthony Dongick Lee of Suwon-si (KR)

Min Seung Lee of Suwon-si (KR)

Myeong Gyoon Chae of Suwon-si (KR)

Seung Seok Ha of Suwon-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240339540 titled 'SEMICONDUCTOR DEVICE

The semiconductor device described in the abstract includes a substrate, an active pattern, a field insulating layer, a gate electrode, source/drain regions, interlayer insulating layers, through vias, and connection portions.

• The active pattern extends in a first horizontal direction on the substrate.
• The field insulating layer surrounds the active pattern on the substrate.
• The gate electrode extends in a second horizontal direction intersecting the active pattern.
• Source/drain regions are located on at least one side of the gate electrode.
• An upper interlayer insulating layer covers the source/drain regions.
• Through vias penetrate through the substrate, field insulating layer, and upper interlayer insulating layer.
• Source/drain contacts are inside the upper interlayer insulating layer and connected to the source/drain regions.
• Connection portions are also inside the upper interlayer insulating layer, connecting the through vias and source/drain contacts.

Potential Applications: - This technology can be used in the manufacturing of advanced semiconductor devices. - It can improve the performance and efficiency of electronic devices.

Problems Solved: - Enhances the connectivity and functionality of semiconductor devices. - Increases the integration density of components on a chip.

Benefits: - Improved performance and efficiency of electronic devices. - Enhanced connectivity and functionality of semiconductor devices.

Commercial Applications: Title: Advanced Semiconductor Device Technology for Enhanced Performance This technology can be applied in the production of high-performance electronic devices such as smartphones, tablets, and computers. It can also be utilized in the development of advanced sensors and communication devices, leading to improved overall product performance and efficiency.

Questions about the technology: 1. How does this semiconductor device technology improve the performance of electronic devices?

  - This technology enhances connectivity and functionality, leading to improved overall performance and efficiency of electronic devices.

2. What are the potential applications of this advanced semiconductor device technology?

  - This technology can be used in various electronic devices, including smartphones, tablets, computers, sensors, and communication devices, to enhance their performance and efficiency.

Original Abstract Submitted

a semiconductor device is provided. the semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on an upper surface of the substrate, a field insulating layer surrounding a sidewall of the active pattern on the upper surface of the substrate, a first gate electrode extending in a second horizontal direction intersecting the first horizontal direction on the active pattern, a source/drain region disposed on at least one side of the first gate electrode on the active pattern, an upper interlayer insulating layer covering the source/drain region on the field insulating layer, a through via penetrating through the substrate, the field insulating layer and the upper interlayer insulating layer in a vertical direction, the through via spaced apart from the source/drain region in the second horizontal direction, a source/drain contact disposed inside the upper interlayer insulating layer on at least one side of the first gate electrode, the source/drain contact connected to the source/drain region, and a connection portion disposed inside the upper interlayer insulating layer, the connection portion connected to each of the through via and the source/drain contact, wherein a width of the connection portion in the first horizontal direction is greater than a width of the source/drain contact in the first horizontal direction.