Intel corporation (20240339428). HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE simplified abstract
Contents
HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
Organization Name
Inventor(s)
Weng Hong Teh of Cambridge MA (US)
Chia-Pin Chiu of Tempe AZ (US)
HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240339428 titled 'HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
The patent application discusses devices with high density interconnects between dice and methods for creating and utilizing these devices. In one embodiment, a device includes a bumpless buildup layer (BBUL) substrate with a first die partially embedded, containing a first set of high density interconnect pads. A second die is also partially embedded in the BBUL substrate, with a second set of high density interconnect pads. A high density interconnect element is embedded in the BBUL substrate, with a third set of high density interconnect pads electrically connected to the first and second sets of pads.
- Devices with high density interconnects between dice
- Bumpless buildup layer (BBUL) substrate
- First die partially embedded with high density interconnect pads
- Second die partially embedded with high density interconnect pads
- High density interconnect element with pads connected to first and second sets
- Techniques for making and using these devices
Potential Applications: - Semiconductor manufacturing - Electronics industry - Integrated circuit design
Problems Solved: - Improved connectivity between dice - Enhanced performance in electronic devices - Miniaturization of components
Benefits: - Higher efficiency in data transfer - Increased reliability in electronic systems - Compact design for space-saving applications
Commercial Applications: Title: High Density Interconnect Devices in Semiconductor Industry This technology can be utilized in the production of advanced electronic devices, such as smartphones, tablets, and computers. The market implications include faster data processing, improved functionality, and reduced footprint in electronic products.
Prior Art: Readers can explore prior patents related to high density interconnects, semiconductor packaging, and integrated circuit design to gain a deeper understanding of the technological advancements in this field.
Frequently Updated Research: Researchers are constantly exploring new materials and manufacturing techniques to further enhance the performance and efficiency of high density interconnect devices in the semiconductor industry.
Questions about High Density Interconnect Devices: 1. How do high density interconnect devices improve the performance of electronic systems? 2. What are the key challenges in implementing high density interconnects in semiconductor manufacturing?
Original Abstract Submitted
discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. in one or more embodiments a device can include a bumpless buildup layer (bbul) substrate including a first die at least partially embedded in the bbul substrate, the first die including a first plurality of high density interconnect pads. a second die can be at least partially embedded in the bbul substrate, the second die including a second plurality of high density interconnect pads. a high density interconnect element can be embedded in the bbul substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.
