Samsung electronics co., ltd. (20240332150). SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE simplified abstract
Contents
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240332150 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
The semiconductor package described in the abstract consists of multiple layers and components, including redistribution wiring layers, lower semiconductor chips, a sealing member, conductive vias, redistribution wiring layers, upper semiconductor chips, and heat dissipation blocks.
- The first redistribution wiring layer contains first redistribution wirings.
- The first lower semiconductor chip and the second lower semiconductor chip are positioned on the first redistribution wiring layer with a gap between them.
- A sealing member covers the lower semiconductor chips and the first redistribution wiring layer.
- Conductive vias penetrate the sealing member between the lower semiconductor chips.
- A second redistribution wiring layer on the sealing member is electrically connected to the conductive vias.
- An upper semiconductor chip is placed on the second redistribution wiring layer and connected to the second redistribution wirings.
- Heat dissipation blocks are respectively located on the first and second lower semiconductor chips.
Potential Applications: This technology can be applied in various electronic devices requiring efficient heat dissipation and compact design, such as smartphones, tablets, and laptops.
Problems Solved: This innovation addresses the challenges of thermal management and space optimization in semiconductor packaging, ensuring reliable performance and longevity of electronic devices.
Benefits: The technology offers improved heat dissipation capabilities, enhanced electrical connectivity, and compact packaging solutions for semiconductor devices.
Commercial Applications: This technology has significant commercial implications in the consumer electronics industry, where compact and efficient semiconductor packaging is crucial for product performance and competitiveness.
Questions about Semiconductor Package Technology: 1. How does this semiconductor package technology improve heat dissipation in electronic devices? 2. What are the key advantages of using conductive vias in semiconductor packaging for electrical connectivity and thermal management?
Original Abstract Submitted
a semiconductor package includes a first redistribution wiring layer having first redistribution wirings; a first lower semiconductor chip and a second lower semiconductor chip spaced apart from each other on the first redistribution wiring layer; a sealing member covering the first lower semiconductor chip and the second lower semiconductor chip on the first redistribution wiring layer; a plurality of conductive vias penetrating the sealing member between the first lower semiconductor chip and the second lower semiconductor chip; a second redistribution wiring layer disposed on the sealing member and having second redistribution wirings electrically connected to the plurality of conductive vias; an upper semiconductor chip disposed on the second redistribution wiring layer and electrically connected to the second redistribution wirings; and a first heat dissipation block and a second heat dissipation block respectively disposed on the first lower semiconductor chip and the second lower semiconductor chip.
