Intel corporation (20240334611). ENHANCED RULE-BASED SHIFTING OF INTEGRATED CIRCUIT VIAS LAYOUTS TO MATCH METALS DURING OPTICAL PROXIMITY CORRECTIONS simplified abstract

ENHANCED RULE-BASED SHIFTING OF INTEGRATED CIRCUIT VIAS LAYOUTS TO MATCH METALS DURING OPTICAL PROXIMITY CORRECTIONS

Organization Name

intel corporation

Inventor(s)

Sunita Thulasi of Portland OR (US)

Dorian Alden of Portland OR (US)

Mark Horsch of Missouri City TX (US)

A S M Jonayat of North Plains OR (US)

Cheng-Tsung Lee of Beaverton OR (US)

Silvia Liong of Portland OR (US)

Seth Morton of Beaverton OR (US)

Omar Rahal-arabi of Tigard OR (US)

Prashanth Kumar Siddhamshetty of Portland OR (US)

ENHANCED RULE-BASED SHIFTING OF INTEGRATED CIRCUIT VIAS LAYOUTS TO MATCH METALS DURING OPTICAL PROXIMITY CORRECTIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240334611 titled 'ENHANCED RULE-BASED SHIFTING OF INTEGRATED CIRCUIT VIAS LAYOUTS TO MATCH METALS DURING OPTICAL PROXIMITY CORRECTIONS

The patent application describes a method for shifting layouts of electronic circuit vias during optical proximity corrections (OPC).

• Identifying the positions of metal lines and vias in an electronic circuit.
• Determining new positions for the metal lines and vias based on the identified positions.
• Generating a layout for a photomask to implement the new positions of the vias.

Potential Applications: - Semiconductor manufacturing - Integrated circuit design - Electronic device production

Problems Solved: - Improving the accuracy of optical proximity corrections in electronic circuits - Enhancing the performance of electronic devices by optimizing circuit layouts

Benefits: - Increased precision in circuit design - Enhanced functionality of electronic devices - Improved manufacturing efficiency

Commercial Applications: Title: "Advanced Circuit Layout Optimization for Semiconductor Industry" This technology can be used in the semiconductor industry to streamline the design and production processes, leading to more efficient and reliable electronic devices.

Prior Art: Researchers can explore prior patents related to OPC methods in semiconductor manufacturing and circuit design to understand the evolution of this technology.

Frequently Updated Research: Researchers in the field of semiconductor manufacturing may be conducting studies on the optimization of electronic circuit layouts using advanced algorithms and software tools.

Questions about Shifting Layouts of Electronic Circuit Vias during OPC: 1. How does this method improve the accuracy of optical proximity corrections in electronic circuits? 2. What are the potential implications of this technology for the semiconductor industry?

Original Abstract Submitted

this disclosure describes systems, methods, and devices related to shifting layouts of electronic circuit vias during optical proximity corrections (opc). a method may include identifying a first metal line, of an electronic circuit, drawn at a first position; identifying a second metal line, of the electronic circuit, drawn at a second position; identifying a via drawn at a third position extending between the first metal line and the second metal line; determining a fourth position to which the first metal line is to move from the first position; determining a fifth position to which the second metal line is to move from the second position; determining, based on the fourth position, the fifth position, a sixth position to which the via is to move from third position; and generating a layout for generating a photomask for the via at the sixth position.