Intel corporation (20240332394). FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-LAYER MOLYBDENUM METAL GATE STACK simplified abstract
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-LAYER MOLYBDENUM METAL GATE STACK
Organization Name
Inventor(s)
David N. Goldstein of Beaverton OR (US)
David J. Towner of Portland OR (US)
Dax M. Crum of Beaverton OR (US)
Omair Saadat of Beaverton OR (US)
Dan S. Lavric of Beaverton OR (US)
Tongtawee Wacharasindhu of Hillsboro OR (US)
Anand S. Murthy of Portland OR (US)
Tahir Ghani of Portland OR (US)
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-LAYER MOLYBDENUM METAL GATE STACK - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240332394 titled 'FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING MULTI-LAYER MOLYBDENUM METAL GATE STACK
The abstract describes gate-all-around integrated circuit structures with a multi-layer molybdenum metal gate stack.
- First vertical arrangement of horizontal nanowires
- Second vertical arrangement of horizontal nanowires
- PMOS gate stack with multi-layer molybdenum structure on first gate dielectric
- NMOS gate stack with multi-layer molybdenum structure or n-type conductive layer on second gate dielectric
Potential Applications: - Advanced semiconductor technology - High-performance integrated circuits - Next-generation electronic devices
Problems Solved: - Enhancing performance and efficiency of integrated circuits - Improving conductivity and gate dielectric properties
Benefits: - Increased speed and reliability of electronic devices - Reduced power consumption and heat generation
Commercial Applications: - Semiconductor industry for manufacturing high-performance chips - Electronics sector for developing cutting-edge devices
Questions about Gate-All-Around Integrated Circuit Structures: 1. How does the multi-layer molybdenum metal gate stack improve the performance of integrated circuits? 2. What are the key differences between the PMOS and NMOS gate stacks in this technology?
Frequently Updated Research: - Ongoing studies on optimizing the design and materials used in gate-all-around integrated circuit structures.
Original Abstract Submitted
gate-all-around integrated circuit structures having a multi-layer molybdenum metal gate stack are described. for example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires, and a second vertical arrangement of horizontal nanowires. a pmos gate stack is over the first vertical arrangement of horizontal nanowires, the pmos gate stack having a multi-layer molybdenum structure on a first gate dielectric. an nmos gate stack is over the second vertical arrangement of horizontal nanowires, the nmos gate stack having the multi-layer molybdenum structure or an n-type conductive layer on a second gate dielectric.
- Intel corporation
- David N. Goldstein of Beaverton OR (US)
- David J. Towner of Portland OR (US)
- Dax M. Crum of Beaverton OR (US)
- Omair Saadat of Beaverton OR (US)
- Dan S. Lavric of Beaverton OR (US)
- Orb Acton of Portland OR (US)
- Tongtawee Wacharasindhu of Hillsboro OR (US)
- Anand S. Murthy of Portland OR (US)
- Tahir Ghani of Portland OR (US)
- H01L29/49
- H01L27/092
- H01L29/06
- H01L29/40
- H01L29/423
- H01L29/66
- H01L29/775
- CPC H01L29/4908