Apple inc. (20240331611). Feedforward Compensation of High-Luminance Banding Mura Compensation simplified abstract
Contents
Feedforward Compensation of High-Luminance Banding Mura Compensation
Organization Name
Inventor(s)
Hyunwoo Nho of Palo Alto CA (US)
Jie Won Ryu of San Jose CA (US)
Patrick R. Cruce of Campbell CA (US)
Nicolas Le Dortz of Palo Alto CA (US)
Wei Xiong of Mountain View CA (US)
Hyunsoo Kim of San Diego CA (US)
Wei H. Yao of Saratoga CA (US)
Sun-Il Chang of San Jose CA (US)
Kingsuk Brahma of Mountain View CA (US)
Ionut A. Mirel of Cupertino CA (US)
Mahesh B. Chappalli of San Jose CA (US)
Ruicong Chen of San Jose CA (US)
Feedforward Compensation of High-Luminance Banding Mura Compensation - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240331611 titled 'Feedforward Compensation of High-Luminance Banding Mura Compensation
Simplified Explanation: The patent application describes apparatuses and techniques to mitigate front-of-screen artifacts caused by voltage fluctuations in electronic displays.
Key Features and Innovation:
- Emission profile awareness circuitry to address artifacts due to direct current mechanisms.
- Two-dimensional digital compensation circuitry to account for emission profiles in displayed content.
- Compensation for alternating current fluctuations through voltage error subtraction and accumulation circuitry.
Potential Applications: This technology can be applied in various electronic displays to improve image quality and reduce visual artifacts caused by voltage fluctuations.
Problems Solved: The technology addresses front-of-screen artifacts that may occur due to voltage fluctuations in both AC and DC mechanisms, enhancing the overall viewing experience for users.
Benefits:
- Improved image quality on electronic displays.
- Reduction of front-of-screen artifacts.
- Enhanced viewing experience for users.
Commercial Applications: This technology can be utilized in the manufacturing of televisions, computer monitors, and other electronic displays to provide a higher quality viewing experience for consumers, potentially leading to increased sales and customer satisfaction.
Questions about Voltage Fluctuation Mitigation: 1. How does the emission profile awareness circuitry help mitigate front-of-screen artifacts? 2. What are the potential benefits of using two-dimensional digital compensation circuitry in electronic displays?
Frequently Updated Research: Ongoing research in this field may focus on further optimizing the compensation techniques for voltage fluctuations in electronic displays to continuously enhance image quality and user experience.
Original Abstract Submitted
embodiments herein provide various apparatuses and techniques to efficiently mitigate front-of-screen (fos) artifacts that may occur due to voltage fluctuations due to alternating current (ac) or direct current (dc) mechanisms that may occur in a variety of pixel types. in one embodiment, emission profile awareness circuitry may be implemented to mitigate for fos artifacts due to dc mechanisms. two-dimensional (2d) digital compensation circuitry may address the dc portion of the voltage fluctuations by accounting for an emission profile applied to content displayed on an electronic display. in some embodiments, the 2d digital compensation circuitry may compensate for the ac portion of the voltage fluctuations by duplicating the ac voltage fluctuations via voltage error subtraction circuitry and voltage error accumulation circuitry.
- Apple inc.
- Hyunwoo Nho of Palo Alto CA (US)
- Jie Won Ryu of San Jose CA (US)
- Patrick R. Cruce of Campbell CA (US)
- Yao Shi of Sunnyvale CA (US)
- Nicolas Le Dortz of Palo Alto CA (US)
- Wei Xiong of Mountain View CA (US)
- Hyunsoo Kim of San Diego CA (US)
- Wei H. Yao of Saratoga CA (US)
- Sun-Il Chang of San Jose CA (US)
- Kingsuk Brahma of Mountain View CA (US)
- Ionut A. Mirel of Cupertino CA (US)
- Mahesh B. Chappalli of San Jose CA (US)
- Ruicong Chen of San Jose CA (US)
- G09G3/20
- G09G3/32
- CPC G09G3/2096