18613435. METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE simplified abstract (ATOMERA INCORPORATED)
METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
Organization Name
Inventor(s)
Donghun Kang of San Jose CA (US)
METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18613435 titled 'METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
The method described in the patent application involves creating a semiconductor device by forming gate stacks with alternating layers of different semiconductor materials, including nanostructures, on a substrate.
- Gate stacks are spaced apart on the substrate, defining trenches between them.
- Each gate stack consists of layers of first and second semiconductor materials, with the second semiconductor material forming nanostructures.
- Source/drain regions are formed within the trenches.
- Insulating regions are created at the lateral ends of the layers of the first semiconductor material.
- Dopant blocking superlattices are formed at the lateral ends of the nanostructures, flush with the adjacent surfaces of the insulating regions.
- The dopant blocking superlattices consist of stacked groups of layers, with each group containing base semiconductor monolayers and at least one non-semiconductor monolayer.
Potential Applications: - Advanced semiconductor devices - Nanotechnology - Electronics industry
Problems Solved: - Enhancing the performance of semiconductor devices - Improving the efficiency of electronic components
Benefits: - Increased speed and efficiency of electronic devices - Enhanced functionality of semiconductor components
Commercial Applications: Title: Advanced Semiconductor Device Manufacturing This technology could revolutionize the semiconductor industry by improving the performance and efficiency of electronic devices. It has the potential to be used in various applications, from consumer electronics to industrial equipment.
Questions about Semiconductor Device Manufacturing: 1. How does this method differ from traditional semiconductor manufacturing processes?
This method incorporates nanostructures and dopant blocking superlattices to enhance device performance, which is not typically seen in traditional processes.
2. What are the potential challenges in scaling up this manufacturing method for mass production?
Scaling up may require optimization of processes to ensure uniformity and consistency in device performance.
Original Abstract Submitted
A method for making a semiconductor device may include forming spaced apart gate stacks on a substrate defining respective trenches therebetween. Each gate stack may include alternating layers of first and second semiconductor materials, with the layers of the second semiconductor material defining nanostructures. The method may further include forming respective source/drain regions within the trenches, forming respective insulating regions adjacent lateral ends of the layers of the first semiconductor material, and forming respective dopant blocking superlattices adjacent lateral ends of the nanostructures and flush with adjacent surfaces of the insulating regions. Each dopant blocking superlattice may include stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
