18613356. METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE simplified abstract (ATOMERA INCORPORATED)
METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
Organization Name
Inventor(s)
Donghun Kang of San Jose CA (US)
METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18613356 titled 'METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
The method described in the patent application involves forming gate stacks on a substrate with alternating layers of first and second semiconductor materials, where the layers of the second semiconductor material define nanostructures. Source/drain regions are formed within the trenches between the gate stacks, along with insulating regions adjacent to the lateral ends of the layers of the first semiconductor material. Dopant blocking superlattices are also formed adjacent to the lateral ends of the nanostructures, offset outwardly from the insulating regions.
- Gate stacks with alternating semiconductor materials and nanostructures
- Source/drain regions within trenches
- Insulating regions adjacent to first semiconductor material layers
- Dopant blocking superlattices adjacent to nanostructures
- Superlattices composed of stacked base semiconductor monolayers and non-semiconductor monolayers
- Potential Applications:**
- Advanced semiconductor devices - High-performance electronics - Nanotechnology research
- Problems Solved:**
- Enhancing semiconductor device performance - Controlling dopant diffusion - Improving device reliability
- Benefits:**
- Increased device efficiency - Enhanced device stability - Better control over dopant profiles
- Commercial Applications:**
Title: Advanced Semiconductor Device Manufacturing This technology could revolutionize the semiconductor industry by enabling the production of high-performance devices with improved reliability and efficiency. Companies in the electronics and nanotechnology sectors could benefit from incorporating this innovation into their manufacturing processes.
- Questions about the Technology:**
1. How does the formation of dopant blocking superlattices impact the performance of semiconductor devices?
- Dopant blocking superlattices help control dopant diffusion, leading to more stable and reliable devices.
2. What are the potential challenges in scaling up the production of semiconductor devices using this method?
- Scaling up production may require optimization of manufacturing processes and materials to ensure consistent and reliable device performance.
Original Abstract Submitted
A method for making semiconductor device may include forming spaced apart gate stacks on a substrate defining respective trenches therebetween. Each gate stack may include alternating layers of first and second semiconductor materials, with the layers of the second semiconductor material defining nanostructures. The method may further include forming respective source/drain regions within the trenches, forming respective insulating regions adjacent lateral ends of the layers of the first semiconductor material, and forming respective dopant blocking superlattices adjacent lateral ends of the nanostructures and offset outwardly from adjacent surfaces of the insulating regions. Each dopant blocking superlattice may include a plurality of stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
