18669014. CLOCK DATA RECOVERY CIRCUIT OF DISPLAY AND CLOCK RECOVERY CIRCUIT THEREOF simplified abstract (LX SEMICON CO., LTD.)
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CLOCK DATA RECOVERY CIRCUIT OF DISPLAY AND CLOCK RECOVERY CIRCUIT THEREOF
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CLOCK DATA RECOVERY CIRCUIT OF DISPLAY AND CLOCK RECOVERY CIRCUIT THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18669014 titled 'CLOCK DATA RECOVERY CIRCUIT OF DISPLAY AND CLOCK RECOVERY CIRCUIT THEREOF
Simplified Explanation: The patent application describes a clock data recovery circuit for a display that can recover a clock from a clock data signal.
- The clock recovery circuit delays the input clock through multiple stages of delay units and outputs delayed clocks.
- The data recovery circuit then uses a recovered clock selected from the delayed clocks to recover data from the clock data signal.
Key Features and Innovation:
- Clock recovery circuit with multiple stages of delay units.
- Data recovery circuit using a recovered clock to extract data from the signal.
Potential Applications:
- Display technologies requiring precise clock data recovery.
- Communication systems where accurate clock synchronization is crucial.
Problems Solved:
- Ensures accurate clock recovery from a clock data signal.
- Improves data extraction from the signal.
Benefits:
- Enhanced display performance.
- Improved data accuracy in communication systems.
Commercial Applications: Clock data recovery circuits can be used in various display technologies, communication systems, and other applications requiring precise clock recovery and data extraction.
Questions about Clock Data Recovery Circuit 1. How does the clock recovery circuit ensure accurate delay of the input clock? 2. What are the potential challenges in implementing a clock data recovery circuit in different display systems?
Frequently Updated Research: Stay updated on advancements in clock data recovery circuits, display technologies, and communication systems for potential improvements and innovations in the field.
Original Abstract Submitted
A clock data recovery circuit of a display suitable for recovering a clock from a clock data signal. The clock data recovery circuit includes a clock recovery circuit configured to delay an input clock through delay units of multiple stages, and output delayed clocks from the delay units, respectively; and a data recovery circuit configured to recover data of a clock data signal using a recovered clock selected among the delayed clocks.
