18358651. NON-VOLATILE MEMORY WITH INTELLIGENT ERASE TESTING TO AVOID NEIGHBOR PLANE DISTURB simplified abstract (Western Digital Technologies, Inc.)

From WikiPatents
Revision as of 06:37, 1 October 2024 by Wikipatents (talk | contribs) (Creating a new page)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

NON-VOLATILE MEMORY WITH INTELLIGENT ERASE TESTING TO AVOID NEIGHBOR PLANE DISTURB

Organization Name

Western Digital Technologies, Inc.

Inventor(s)

Liang Li of Shanghai (CN)

Dandan Yi of Shanghai (CN)

Dana Lee of Saratoga CA (US)

NON-VOLATILE MEMORY WITH INTELLIGENT ERASE TESTING TO AVOID NEIGHBOR PLANE DISTURB - A simplified explanation of the abstract

This abstract first appeared for US patent application 18358651 titled 'NON-VOLATILE MEMORY WITH INTELLIGENT ERASE TESTING TO AVOID NEIGHBOR PLANE DISTURB

Simplified Explanation

A non-volatile memory system can erase groups of memory cells in multiple planes simultaneously. If a group of memory cells in one plane is slow to erase, the system will perform multiplane erase processes without erasing the slow group.

  • Non-volatile memory system
  • Multiplane erase process
  • Simultaneous erasure of memory cells in multiple planes
  • Identification of slow-to-erase memory cell groups
  • Exclusion of slow group from multiplane erase processes

Key Features and Innovation

  • Efficient multiplane erase process
  • Improved erase speed for non-volatile memory systems
  • Enhanced performance by excluding slow-to-erase memory cell groups
  • Optimization of memory cell erasure in multiple planes
  • Increased reliability of memory system operations

Potential Applications

This technology can be applied in:

  • Solid-state drives
  • Embedded systems
  • Industrial automation
  • Data centers
  • Consumer electronics

Problems Solved

  • Slow erase speed of memory cells
  • Inefficient multiplane erase processes
  • Risk of data loss due to slow-to-erase memory cell groups
  • Reduced performance of non-volatile memory systems
  • Unreliable memory cell erasure operations

Benefits

  • Faster erase speed
  • Improved efficiency in multiplane erase processes
  • Enhanced reliability of memory systems
  • Optimal performance of non-volatile memory systems
  • Reduced risk of data loss

Commercial Applications

Title: Enhanced Non-Volatile Memory Systems for Faster Data Erasure This technology can be commercially used in:

  • Manufacturing of solid-state drives
  • Development of embedded systems
  • Integration into industrial automation equipment
  • Implementation in data center storage solutions
  • Incorporation into consumer electronics devices

Questions about Non-Volatile Memory Systems

How does the multiplane erase process improve the efficiency of memory cell erasure?

The multiplane erase process allows for concurrent erasure of memory cells in multiple planes, reducing the overall erase time and improving system performance.

What are the potential applications of this technology beyond non-volatile memory systems?

This technology can also be applied in solid-state drives, embedded systems, industrial automation, data centers, and consumer electronics for enhanced data management and storage capabilities.


Original Abstract Submitted

A non-volatile memory system is configured to perform a multiplane erase process that concurrently erases groups of memory cells in multiple planes. Based on that multiplane erase process, the memory system determines that a first group of memory cells in a first plane of the multiple planes is slow to erase. As a result, the system will perform one or more multiplane erase processes for the groups of memory cells in multiple planes without erasing the first group of memory cells in the first plane as part of the multiplane erase process(es).