MEDIATEK INC. patent applications published on September 19th, 2024
Contents
- 1 Patent applications for MEDIATEK INC. on September 19th, 2024
- 1.1 APPARATUS AND METHOD FOR OPERATING CENTRAL-PROCESSING UNITS IN SLEEP MODE (18604681)
- 1.2 Testing Benchmark Generation Method and Testing Benchmark Generation System Capable of Adjusting Prompt Data (18603186)
- 1.3 RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING (18396711)
- 1.4 MULTIPLICATION-ACCUMULATION CIRCUIT USED IN A NODE OF ARTIFICIAL NEURAL NETWORK (18444747)
- 1.5 Frame Interpolation Using Both Optical Motion And In-Game Motion (18605789)
- 1.6 NEGATIVE BIT LINE CONTROL MECHANISM (18444754)
- 1.7 DUAL-RAIL MEMORY DEVICE WITH HIGH SPEED AND LOW POWER CONSUMPTION (18444776)
- 1.8 MEMORY WITH BUILT-IN SYNCHRONOUS-WRITE-THROUGH REDUNDANCY AND ASSOCIATED TEST METHOD (18443347)
- 1.9 ELECTRONIC DEVICE (18594446)
- 1.10 AREA-EFFICIENT COMPENSATION CIRCUIT FOR LOW-POWER MULTI-STAGE AMPLIFIER (18433468)
- 1.11 SIGNAL LOSS COMPENSATION METHOD (18223040)
- 1.12 JOINT COMMUNICATION AND SENSING METHOD AND RELATED USER EQUIPMENT FOR ORTHOGONAL FREQUENCY DOMAIN MULTIPLEXING COMMUNICATION SYSTEM (18593991)
- 1.13 NP-MICRO FOR VIDEO ARTIFICIAL INTELLIGENCE (AI) HARDWARE (HW) PIPELINE (18422729)
- 1.14 METHOD AND APPARATUS FOR SETTING UP COORDINATED SERVICE PERIOD IN MULTIPLE ACCESS POINT ENVIRONMENT (18679484)
- 1.15 ELECTRONIC SYSTEM (18595907)
Patent applications for MEDIATEK INC. on September 19th, 2024
APPARATUS AND METHOD FOR OPERATING CENTRAL-PROCESSING UNITS IN SLEEP MODE (18604681)
Main Inventor
Meng-Ju HSIEH
Testing Benchmark Generation Method and Testing Benchmark Generation System Capable of Adjusting Prompt Data (18603186)
Main Inventor
Wei-Liang Kuo
RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING (18396711)
Main Inventor
Jen-Wei Lee
MULTIPLICATION-ACCUMULATION CIRCUIT USED IN A NODE OF ARTIFICIAL NEURAL NETWORK (18444747)
Main Inventor
Chun-Hao Wei
Frame Interpolation Using Both Optical Motion And In-Game Motion (18605789)
Main Inventor
Tsung-Shian Huang
NEGATIVE BIT LINE CONTROL MECHANISM (18444754)
Main Inventor
Weinan Liao
DUAL-RAIL MEMORY DEVICE WITH HIGH SPEED AND LOW POWER CONSUMPTION (18444776)
Main Inventor
Weinan Liao
MEMORY WITH BUILT-IN SYNCHRONOUS-WRITE-THROUGH REDUNDANCY AND ASSOCIATED TEST METHOD (18443347)
Main Inventor
Che-Wei Chou
ELECTRONIC DEVICE (18594446)
Main Inventor
Hui-Chi TANG
AREA-EFFICIENT COMPENSATION CIRCUIT FOR LOW-POWER MULTI-STAGE AMPLIFIER (18433468)
Main Inventor
You-Shin Chen
SIGNAL LOSS COMPENSATION METHOD (18223040)
Main Inventor
Shao-Wei Fan Jiang
JOINT COMMUNICATION AND SENSING METHOD AND RELATED USER EQUIPMENT FOR ORTHOGONAL FREQUENCY DOMAIN MULTIPLEXING COMMUNICATION SYSTEM (18593991)
Main Inventor
Rui Zhang
NP-MICRO FOR VIDEO ARTIFICIAL INTELLIGENCE (AI) HARDWARE (HW) PIPELINE (18422729)
Main Inventor
Hsu CHIA-FENG
METHOD AND APPARATUS FOR SETTING UP COORDINATED SERVICE PERIOD IN MULTIPLE ACCESS POINT ENVIRONMENT (18679484)
Main Inventor
Chien-Fang Hsu
ELECTRONIC SYSTEM (18595907)
Main Inventor
Tso-Ju YI