18419973. FIELD EFFECT TRANSISTOR simplified abstract (DENSO CORPORATION)
Contents
FIELD EFFECT TRANSISTOR
Organization Name
Inventor(s)
Ryota Suzuki of Nisshin-shi (JP)
FIELD EFFECT TRANSISTOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 18419973 titled 'FIELD EFFECT TRANSISTOR
Simplified Explanation: The patent application describes a field effect transistor design where deep layers of p-type material are arranged below corresponding trenches, with a drain-side layer of n-type material distributed between the deep layers.
Key Features and Innovation:
- Trench lower layers are directly below corresponding trenches.
- Deep layers of p-type material extend along one direction and are arranged at intervals in another direction.
- Drain-side layer of n-type material is distributed between the deep layers.
- Drain-side layer includes high concentration and intermediate concentration layers.
Potential Applications: This technology could be used in the development of advanced field effect transistors for various electronic devices, such as smartphones, computers, and other integrated circuits.
Problems Solved: This technology addresses the need for improved performance and efficiency in field effect transistors by optimizing the distribution of different types of semiconductor materials within the device.
Benefits:
- Enhanced performance and efficiency in field effect transistors.
- Improved control and functionality of electronic devices.
- Potential for smaller and more powerful electronic devices.
Commercial Applications: The technology could have significant implications in the semiconductor industry, leading to the development of more advanced and efficient electronic devices with improved performance and functionality.
Questions about Field Effect Transistors: 1. How do field effect transistors differ from other types of transistors? 2. What are the key advantages of using field effect transistors in electronic devices?
Frequently Updated Research: Researchers are continually exploring new ways to enhance the performance and efficiency of field effect transistors through innovative materials and design strategies. Stay updated on the latest advancements in this field to understand the full potential of this technology.
Original Abstract Submitted
In a field effect transistor, trench lower layers are disposed directly below corresponding trenches. Deep layers of p-type extend along a first direction intersecting the trenches and are arranged at intervals along a second direction orthogonal to the first direction. A drain-side layer of n-type is distributed from a position in contact with a lower surface of a body layer to a position below a lower end of each of the deep layers through intervals between the deep layers. The drain-side layer includes a high concentration layer distributed in at least a part of a depth range in which both the deep layers and the trench lower layers are present, and an intermediate concentration layer distributed in at least a part of a depth range between a lower end of the high concentration layer and a lower end of each of the deep layers.
