18530542. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Kyounglim Suk of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18530542 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application consists of a complex structure involving multiple layers and components.
- The package includes a first redistribution structure with a redistribution insulating layer and pattern, a first lower semiconductor device mounted on this structure, and a molding layer surrounding the device.
- Vertical connection conductors are present in the molding layer, electrically connected to the first redistribution pattern.
- A heat dissipation plate is located on the upper surface of the first lower semiconductor device.
- Multiple upper semiconductor devices are positioned on the molding layer and the first lower semiconductor device, each overlapping a different region of the lower device.
Potential Applications: - This technology could be used in advanced semiconductor packaging for various electronic devices. - It may find applications in high-performance computing, telecommunications, and consumer electronics.
Problems Solved: - The technology addresses the need for efficient heat dissipation in semiconductor devices. - It enables complex vertical stacking of semiconductor devices in a compact package.
Benefits: - Improved thermal management for semiconductor devices. - Higher integration density and performance in electronic systems.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology could be utilized in the development of high-performance computing systems, advanced smartphones, and networking equipment, enhancing their efficiency and reliability.
Questions about the technology: 1. How does the vertical stacking of semiconductor devices in this package improve overall performance? 2. What are the key advantages of using a heat dissipation plate in this semiconductor package design?
Original Abstract Submitted
A semiconductor package includes a first redistribution structure including a first redistribution insulating layer and a first redistribution pattern, a first lower semiconductor device mounted on the first redistribution structure, a molding layer surrounding the first lower semiconductor device on the first redistribution structure, a plurality of vertical connection conductors in the molding layer and electrically connected to the first redistribution pattern, a heat dissipation plate disposed on an upper surface of the first lower semiconductor device, and a plurality of upper semiconductor devices disposed on the molding layer and on the first lower semiconductor device, each of the plurality of upper semiconductor devices vertically overlapping a different respective region of the first lower semiconductor device.
