18607907. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Yoonyoung Jeon of Suwon-si (KR)
Dongheon Kang of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18607907 titled 'SEMICONDUCTOR PACKAGE
The semiconductor package described in the patent application includes a complex structure involving redistribution patterns, conductive posts, a molding layer, and insulating layers.
- The package consists of a first redistribution structure with a semiconductor chip and conductive posts.
- A molding layer surrounds the semiconductor chip and conductive posts.
- A second redistribution structure is located on top of the molding layer.
- The second redistribution structure includes a redistribution pattern, a pad structure, and insulating layers.
- The pad structure is made up of multiple layers, with concavo-convex surfaces in contact with the insulating layer.
Potential Applications: - This technology can be used in various electronic devices such as smartphones, tablets, and computers. - It can also be applied in automotive electronics, medical devices, and industrial equipment.
Problems Solved: - The semiconductor package provides improved connectivity and reliability for electronic components. - It offers enhanced protection for the semiconductor chip and conductive elements.
Benefits: - Increased performance and durability of electronic devices. - Enhanced signal transmission and reduced risk of electrical failures.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Device Performance This technology can be utilized by semiconductor manufacturers, electronics companies, and technology firms looking to improve the quality and reliability of their products. It can lead to the development of more advanced and efficient electronic devices, attracting a wider customer base and increasing market competitiveness.
Questions about Semiconductor Packaging Technology: 1. How does the concavo-convex structure of the pad layers benefit the overall performance of the semiconductor package? 2. What are the specific challenges in implementing this complex semiconductor packaging technology in mass production processes?
Original Abstract Submitted
A semiconductor package may include a first redistribution structure, a semiconductor chip on the first redistribution structure, conductive posts spaced apart from the semiconductor chip and on the first redistribution structure, a molding layer on the first redistribution structure and surrounding the semiconductor chip and the conductive posts, and a second redistribution structure on the molding layer. The second redistribution structure may include a second redistribution pattern, a pad structure connected to the second redistribution pattern, and a second redistribution insulating layer. The second redistribution insulating layer may include a first insulating layer surrounding the second redistribution pattern and a second insulating layer surrounding at least a portion of the pad structure. The pad structure may include a second pad layer on a first pad layer. Surfaces of the first and second pad layers in contact with the second insulating layer may be concavo-convex.
