Samsung electronics co., ltd. (20240322004). METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE simplified abstract
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METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE
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METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240322004 titled 'METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE
The abstract describes a method of manufacturing an integrated circuit device involving the formation of a fin-type active region and a stack structure with sacrificial semiconductor layers and nanosheet semiconductor layers.
- Formation of a first local liner on the stack structure's sidewall to cover the bottom sacrificial semiconductor layer's sidewall.
- Formation of a second local liner on the stack structure's sidewall to cover the other sacrificial semiconductor layers' sidewalls.
- Exposing the bottom sacrificial semiconductor layer by removing the first local liner.
- Creating a bottom insulating space to expose the fin top surface of the fin-type active region by removing the bottom sacrificial semiconductor layer.
- Forming a bottom insulating structure in the bottom insulating space.
Potential Applications: - Semiconductor manufacturing - Integrated circuit fabrication - Nanotechnology research
Problems Solved: - Efficient fabrication of integrated circuit devices - Precise control over semiconductor layer deposition
Benefits: - Enhanced performance of integrated circuits - Improved scalability and miniaturization of devices
Commercial Applications: Title: Advanced Semiconductor Manufacturing Process This technology can be used in the production of high-performance electronic devices, leading to advancements in the semiconductor industry and potential market growth.
Prior Art: Readers can explore prior research on semiconductor manufacturing processes, nanosheet technology, and integrated circuit fabrication to gain a deeper understanding of the field.
Frequently Updated Research: Stay updated on the latest advancements in semiconductor manufacturing techniques, nanosheet semiconductor technology, and integrated circuit design for cutting-edge developments in the industry.
Questions about the technology: 1. How does the method described in the abstract improve the efficiency of integrated circuit device manufacturing? 2. What are the key advantages of using sacrificial semiconductor layers in the fabrication process?
Original Abstract Submitted
a method of manufacturing an integrated circuit device includes forming, on a substrate, a fin-type active region and a stack structure in which sacrificial semiconductor layers and nanosheet semiconductor layers are alternately stacked one-by-one, forming a first local liner on a sidewall of the stack structure to cover a sidewall of a bottom sacrificial semiconductor layer, which is closest to the fin-type active region and expose sidewalls of other sacrificial semiconductor layers, forming a second local liner on the sidewall of the stack structure to cover the sidewalls of the other sacrificial semiconductor layers except for the bottom sacrificial semiconductor layer, exposing the bottom sacrificial semiconductor layer by removing the first local liner, forming a bottom insulating space exposing a fin top surface of the fin-type active region by removing the bottom sacrificial semiconductor layer, and forming a bottom insulating structure in the bottom insulating space.
