Samsung electronics co., ltd. (20240321866). ESD PROTECTION CIRCUITRY, AND ELECTRONIC DEVICE INCLUDING ESD PROTECTION CIRCUITRY simplified abstract
Contents
ESD PROTECTION CIRCUITRY, AND ELECTRONIC DEVICE INCLUDING ESD PROTECTION CIRCUITRY
Organization Name
Inventor(s)
Jungjune Park of Suwon-si (KR)
ESD PROTECTION CIRCUITRY, AND ELECTRONIC DEVICE INCLUDING ESD PROTECTION CIRCUITRY - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321866 titled 'ESD PROTECTION CIRCUITRY, AND ELECTRONIC DEVICE INCLUDING ESD PROTECTION CIRCUITRY
The abstract describes an electrostatic discharge protection circuit comprising an NMOS transistor, an RC circuit, a clamping circuit, and a switch.
- The NMOS transistor is connected to a supply voltage pin and a ground pin.
- The RC circuit, parallel to the NMOS transistor, consists of a capacitor and a resistor.
- The clamping circuit, parallel to the resistor of the RC circuit, includes multiple diodes.
- The switch connects the clamping circuit to the gate node of the NMOS transistor.
- The number of diodes in the clamping circuit is determined by the breakdown voltage and operating voltage of the internal circuit to be protected.
- The switch includes a PMOS transistor and a sub-RC circuit with a sub-capacitor and a sub-resistor.
Potential Applications: - Integrated circuits - Electronic devices - Microcontrollers
Problems Solved: - Protection against electrostatic discharge - Safeguarding internal circuits from voltage spikes
Benefits: - Enhanced reliability of electronic components - Improved longevity of devices - Cost-effective solution for ESD protection
Commercial Applications: Title: "Advanced ESD Protection Circuits for Enhanced Electronics Reliability" This technology can be utilized in various industries such as consumer electronics, automotive, telecommunications, and medical devices. It offers a competitive advantage by ensuring the durability and longevity of electronic products.
Questions about the technology: 1. How does the number of diodes in the clamping circuit impact the protection level against electrostatic discharge? 2. What are the key differences between this ESD protection circuit and traditional methods?
Original Abstract Submitted
an electrostatic discharge protection circuit includes an nmos transistor connected to a supply voltage pin through a first node and connected to a ground pin through a second node, an rc circuit connected in parallel with the nmos transistor and including a capacitor and a resistor, and a clamping circuit connected in parallel with the resistor of the rc circuit and including a plurality of diodes; and a switch connecting the clamping circuit to a gate node of the nmos transistor, wherein a number of the plurality of diodes is set based on a breakdown voltage and an operating voltage of an internal circuit to be protected by the esd protection circuit, and the switch includes a pmos transistor connecting the gate node of the nmos transistor to the clamping circuit and a sub-rc circuit connected in parallel with the pmos transistor and including a sub-capacitor and a sub-resistor.
