Samsung electronics co., ltd. (20240321804). SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME simplified abstract
Contents
SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Unbyoung Kang of Suwon-si (KR)
Seokbong Park of Suwon-si (KR)
SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321804 titled 'SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME
The abstract describes a semiconductor package with a redistribution structure containing wiring lines and insulating layers, where the outermost wiring lines have different surface roughness based on their width.
- The semiconductor package includes a semiconductor chip and a redistribution structure.
- The redistribution structure consists of wiring lines and insulating layers.
- The wiring lines are divided into subsets, with the outermost lines having greater vertical distance from the package unit.
- The surface roughness of the outermost wiring lines varies based on their width in the horizontal direction.
Potential Applications: - This technology can be used in various semiconductor packaging applications to enhance performance and reliability. - It can improve signal transmission and reduce interference in electronic devices.
Problems Solved: - The technology addresses the need for efficient and reliable semiconductor packaging solutions. - It helps in optimizing the layout of wiring lines for better performance.
Benefits: - Improved signal transmission and reduced interference. - Enhanced reliability and performance of semiconductor packages.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology can be utilized in the manufacturing of advanced electronic devices such as smartphones, tablets, and computers to improve their overall performance and reliability.
Questions about Semiconductor Packaging Technology: 1. How does the surface roughness of the outermost wiring lines impact the performance of the semiconductor package?
- The surface roughness affects the signal transmission and interference levels in the package, ultimately influencing its overall performance.
2. What are the key factors to consider when designing a redistribution structure for a semiconductor package?
- Factors such as vertical distance, surface roughness, and wiring line layout play a crucial role in the design of an efficient redistribution structure.
Original Abstract Submitted
a semiconductor package a first package unit comprising a semiconductor chip; and a redistribution structure on the first package unit, wherein the redistribution structure comprises a plurality of wiring lines and a plurality of insulating layers on the plurality of wiring lines, wherein the plurality of wiring lines comprise first subset including a plurality of outermost wiring lines and a second subset, wherein a vertical distance between the plurality of outermost wiring lines and the first package unit is greater than a vertical distance between the second subset of the plurality of wiring lines and the first package unit, a respective surface roughness of each of the plurality of outermost wiring lines is different, and the respective surface roughness of each of the plurality of outermost wiring lines is based on a respective width of each of the plurality of outermost wiring lines in a horizontal direction.
