Samsung electronics co., ltd. (20240321700). SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD simplified abstract
Contents
SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD
Organization Name
Inventor(s)
Unbyoung Kang of Suwon-si (KR)
Seokbong Park of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240321700 titled 'SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD
The semiconductor package described in the patent application consists of various components such as an upper redistribution structure, a first substrate, two semiconductor chips, a bridge chip, and a first insulating layer. The upper redistribution structure includes an insulating layer and redistribution patterns, while the first substrate has cavities for accommodating the semiconductor chips.
- The upper redistribution structure contains an insulating layer and redistribution patterns.
- The first substrate has cavities for housing the semiconductor chips.
- The first semiconductor chip is connected to a subset of the redistribution patterns.
- The second semiconductor chip is also connected to a subset of the redistribution patterns.
- The bridge chip is positioned below the upper redistribution structure.
- The first insulating layer surrounds the bridge chip.
Potential Applications: - This technology can be used in the manufacturing of advanced semiconductor packages for various electronic devices. - It can improve the performance and reliability of integrated circuits in applications such as smartphones, computers, and automotive electronics.
Problems Solved: - Enhances the electrical connections between semiconductor chips and redistribution patterns. - Provides a more compact and efficient design for semiconductor packages.
Benefits: - Improved electrical connectivity and signal transmission. - Enhanced performance and reliability of electronic devices. - Compact design for space-saving in electronic applications.
Commercial Applications: Title: Advanced Semiconductor Packaging Technology for Enhanced Performance This technology can be utilized in the production of high-performance electronic devices, leading to improved functionality and reliability. The market implications include increased demand for advanced semiconductor packages in various industries such as consumer electronics, telecommunications, and automotive.
Questions about the Technology: 1. How does this semiconductor package design improve the overall performance of electronic devices? 2. What are the potential cost savings associated with implementing this technology in semiconductor manufacturing processes?
Frequently Updated Research: Stay updated on the latest advancements in semiconductor packaging technology to ensure optimal performance and reliability in electronic devices. Regularly check for new developments in materials, design techniques, and manufacturing processes to stay ahead in the industry.
Original Abstract Submitted
a semiconductor package includes an upper redistribution structure, a first substrate, a first semiconductor chip, a second semiconductor chip, a bridge chip, and a first insulating layer. the upper redistribution structure includes an upper redistribution insulating layer and upper redistribution patterns. the first substrate includes an upper surface, a lower surface, a first cavity extending in a vertical direction, and a second cavity provided apart from the first cavity in a horizontal direction and extending in the vertical direction. the first substrate is on an upper surface of the upper redistribution structure. the first semiconductor chip is accommodated in the first cavity and electrically connected to a subset of the upper redistribution patterns. the second semiconductor chip is accommodated in the second cavity and electrically connected to a subset of the upper redistribution patterns. the bridge chip is below the upper redistribution structure. the first insulating layer surrounds the bridge chip.
