Kioxia corporation (20240306388). SEMICONDUCTOR MEMORY DEVICE simplified abstract

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SEMICONDUCTOR MEMORY DEVICE

Organization Name

kioxia corporation

Inventor(s)

Hiroshi Nakaki of Yokkaichi Mie (JP)

SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240306388 titled 'SEMICONDUCTOR MEMORY DEVICE

The semiconductor memory device described in the abstract consists of a stacked body, columnar bodies, bit lines, contacts, and dividing portions.

  • The dividing portions are located separately in the third direction, extending in the first direction within the stacked body, and divide one or more gate electrode layers.
  • The columnar bodies include five bodies between two adjacent dividing portions, with each body connected to a separate bit line.
  • Each bit line is connected to a columnar body adjacent to it at the shortest interval among the five columnar bodies.
    • Key Features and Innovation:**
  • Stacked body design with dividing portions for gate electrode layer separation.
  • Columnar bodies connected to separate bit lines for efficient data storage and retrieval.
    • Potential Applications:**
  • Semiconductor memory devices in various electronic devices.
  • High-speed data processing applications.
    • Problems Solved:**
  • Efficient data storage and retrieval in semiconductor memory devices.
  • Improved performance and reliability of memory systems.
    • Benefits:**
  • Enhanced data processing speed.
  • Increased data storage capacity.
  • Improved overall performance of electronic devices.
    • Commercial Applications:**
  • Memory modules for computers and servers.
  • Solid-state drives for data storage in consumer electronics.
    • Questions about Semiconductor Memory Devices:**

1. How does the design of dividing portions contribute to the efficiency of data storage in the memory device? 2. What are the potential challenges in scaling up this technology for mass production?

    • Frequently Updated Research:**

Ongoing research focuses on enhancing the speed and capacity of semiconductor memory devices through innovative design and materials.


Original Abstract Submitted

a semiconductor memory device includes a stacked body, a plurality of columnar bodies, a plurality of bit lines, a plurality of contacts, and a plurality of dividing portions. the plurality of dividing portions is located separately in the third direction, each extending in the first direction in the stacked body, and dividing one or more gate electrode layers including the lowermost layer of the plurality of gate electrode layers in the third direction, when the one side is the lower side. the plurality of columnar bodies includes five columnar bodies provided in a region between two adjacent dividing portions among the plurality of dividing portions. regarding each columnar body provided in the five columnar bodies, a separate bit line provided in the plurality of bit lines is present between a bit line provided in the plurality of bit lines and electrically connected to the columnar body, and each bit line provided in the plurality of bit lines and electrically connected to a columnar body adjacent to that columnar body at the shortest interval among the five columnar bodies.