Samsung electronics co., ltd. (20240259176). RECEIVING DEVICE AND OPERATING METHOD THEREOF simplified abstract

RECEIVING DEVICE AND OPERATING METHOD THEREOF

Organization Name

samsung electronics co., ltd.

Inventor(s)

Byungwook Cho of Suwon-si (KR)

Subin Yim of Suwon-si (KR)

RECEIVING DEVICE AND OPERATING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240259176 titled 'RECEIVING DEVICE AND OPERATING METHOD THEREOF

The patent application describes a receiving device that includes various components to improve the timing and accuracy of digital samples obtained from an analog signal.

• The delay buffer receives the analog signal and outputs a delayed analog signal.
• The phase interpolator generates a clock signal based on a phase compensation code signal and a reference clock signal.
• The analog-to-digital converter group determines the slope type of the analog signal based on the input signals.
• The clock data restorer evaluates the curve type of digital samples and adjusts the timing of the clock signal to optimize sample timing.

Potential Applications: - This technology can be used in communication systems to improve signal processing and data transmission accuracy. - It can also be applied in medical devices for precise data collection and analysis.

Problems Solved: - Addressing timing issues in digital sampling processes. - Enhancing the accuracy of digital data conversion from analog signals.

Benefits: - Improved signal processing accuracy. - Enhanced data transmission efficiency. - Optimal timing for digital sampling.

Commercial Applications: Title: Advanced Signal Processing Technology for Enhanced Data Accuracy This technology can be utilized in telecommunications, medical devices, and scientific instruments to improve data processing and accuracy, leading to better performance and reliability in various applications.

Questions about the technology: 1. How does the clock data restorer optimize sample timing based on the curve type and slope type determination? 2. What are the specific advantages of using a phase interpolator in generating clock signals for digital sampling processes?

Original Abstract Submitted

a receiving device includes a delay buffer configured to receive an analog signal and output a delayed analog signal, a phase interpolator configured to output a clock signal based on a phase compensation code signal and a reference clock signal, an analog-to-digital converter group configured to output a slope type determination signal indicating a slope of the analog signal based on the analog signal and the delayed analog signal, and a clock data restorer. the clock data restorer is configured to determine a curve type associated with a plurality of digital samples from the analog-to-digital converter group. the clock data restorer also evaluates a timing of the clock signal based on the curve type and the slope type determination signal, and outputs the phase compensation code signal to move the sample timing closer to an optimum timing.