17390274. INTEGRATED CIRCUITS (IC) EMPLOYING SUBSYSTEM SHARED CACHE MEMORY FOR FACILITATING EXTENSION OF LOW-POWER ISLAND (LPI) MEMORY AND RELATED METHODS simplified abstract (QUALCOMM Incorporated)

INTEGRATED CIRCUITS (IC) EMPLOYING SUBSYSTEM SHARED CACHE MEMORY FOR FACILITATING EXTENSION OF LOW-POWER ISLAND (LPI) MEMORY AND RELATED METHODS

Organization Name

QUALCOMM Incorporated

Inventor(s)

Girish Bhat of San Diego CA (US)

Subbarao Palacharla of San Diego CA (US)

Jeffrey Shabel of San Diego CA (US)

Isaac Berk of San Diego CA (US)

Kedar Bhole of San Diego CA (US)

Vipul Gandhi of San Diego CA (US)

George Patsilaras of San Diego CA (US)

Sparsh Singhai of San Diego CA (US)

INTEGRATED CIRCUITS (IC) EMPLOYING SUBSYSTEM SHARED CACHE MEMORY FOR FACILITATING EXTENSION OF LOW-POWER ISLAND (LPI) MEMORY AND RELATED METHODS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17390274 titled 'INTEGRATED CIRCUITS (IC) EMPLOYING SUBSYSTEM SHARED CACHE MEMORY FOR FACILITATING EXTENSION OF LOW-POWER ISLAND (LPI) MEMORY AND RELATED METHODS

Simplified Explanation

The patent application describes a system for extending low-power memory in integrated circuits using shared cache memory. The system includes a low-power island (LPI) subsystem and primary subsystems that access a memory subsystem through different interfaces depending on the power mode.

• The primary subsystems and LPI subsystem can send memory access requests to the memory subsystem in the first power mode using a virtual memory address.
• The memory subsystem can access data stored in an external memory or a version of the data stored in a shared memory circuit based on the memory access request.
• In the low-power mode, the LPI subsystem can send a memory access request to the memory subsystem using a direct memory address.
• The memory subsystem can access the shared memory circuit to extend the LPI memory based on the memory access request.

Potential applications of this technology:

• Mobile devices: This technology can be used in smartphones, tablets, and other mobile devices to optimize memory usage and extend low-power memory.
• Internet of Things (IoT) devices: IoT devices often have limited power and memory resources, and this technology can help improve their performance and efficiency.
• Wearable devices: Wearable devices, such as smartwatches and fitness trackers, can benefit from this technology to enhance their memory capabilities while conserving power.

Problems solved by this technology:

• Limited low-power memory: The system addresses the issue of limited low-power memory in integrated circuits by extending it using shared cache memory.
• Power efficiency: By accessing the memory subsystem through different interfaces based on the power mode, the system improves power efficiency and reduces energy consumption.

Benefits of this technology:

• Enhanced memory capabilities: The system allows for the extension of low-power memory, providing more storage capacity for data and applications.
• Improved power efficiency: By utilizing shared cache memory and optimizing memory access based on power modes, the system improves power efficiency and extends battery life.
• Better performance: The system enables faster access to memory by utilizing different interfaces and optimizing memory access based on the power mode, resulting in improved overall performance.

Original Abstract Submitted

Integrated circuits (ICs) employ subsystem shared cache memory for facilitating extension of low-power island (LPI) memory. An LPI subsystem and primary subsystems access a memory subsystem on a first access interface in a first power mode and the LPI subsystem accesses the memory subsystem by a second access interface in the low power mode. In the first power mode, the primary subsystems and the LPI subsystem may send a subsystem memory access request including a virtual memory address to a subsystem memory interface of the memory subsystem to access either data stored in an external memory or a version of the data stored in a shared memory circuit. In the low-power mode, the LPI subsystem sends an LPI memory access request including a direct memory address to an LPI memory interface of the memory subsystem to access the shared memory circuit to extend the LPI memory.