18180437. SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Ji Young Kim of Suwon-si (KR)

Do Hyung Kim of Suwon-si (KR)

Ji Won Kim of Suwon-si (KR)

Suk Kang Sung of Suwon-si (KR)

SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18180437 titled 'SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS

Simplified Explanation

The patent application describes a semiconductor memory device that includes a semiconductor layer, a source structure, a plurality of gate electrodes, and a channel structure.

• The semiconductor layer has a first face and a second face, with a source structure placed on the second face.
• The source structure consists of a plate and a plug that extends through the semiconductor layer.
• The plurality of gate electrodes are stacked on the first face of the semiconductor layer.
• The channel structure is located on the plug and is electrically connected to the source structure.

Potential applications of this technology:

• Memory devices in electronic devices such as smartphones, tablets, and computers.
• Data storage in cloud computing and data centers.
• High-speed data processing in artificial intelligence and machine learning systems.

Problems solved by this technology:

• Improved performance and efficiency of semiconductor memory devices.
• Enhanced data storage and retrieval capabilities.
• Reduction in power consumption and heat generation.

Benefits of this technology:

• Faster data access and transfer speeds.
• Increased storage capacity.
• Lower energy consumption and improved battery life in portable devices.
• Enhanced reliability and durability of memory devices.

Original Abstract Submitted

According to some implementations of the present disclosure, a semiconductor memory device includes a semiconductor layer including a first face and a second face opposite to the first face in a first direction directed upward from the first face to the second face; a source structure including: a plate disposed on the second face of the semiconductor layer; and a plug extending from the plate through the semiconductor layer; a plurality of gate electrodes disposed on the first face of the semiconductor layer and sequentially stacked on one an other; and a channel structure that extends through the plurality of gate electrodes and that is disposed on the plug, wherein the channel structure is electrically connected to the source structure.