18455904. MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Byunghoon Jeong of Hwaseong-si (KR)

Kyungtae Kang of Seoul (KR)

Jangwoo Lee of Seoul (KR)

Jeongdon Ihm of Seongnam-si (KR)

MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18455904 titled 'MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

Simplified Explanation

The abstract describes a memory device that includes a memory cell array and a data output circuit. The memory cell array stores data, while the data output circuit transmits status data and the data read from the memory cell array to an external device.

  • The memory device has a memory cell array that stores data.
  • The data output circuit transmits status data to an external device through at least one data line in a latency period.
  • The data output circuit also transmits the data read from the memory cell array to the external device through the same data line(s) in a period after the latency period.

Potential applications of this technology:

  • Computer memory systems
  • Data storage devices
  • Embedded systems
  • Mobile devices

Problems solved by this technology:

  • Efficient data transmission from memory devices to external devices
  • Minimizing latency in data transmission

Benefits of this technology:

  • Faster data transfer between memory devices and external devices
  • Improved overall system performance
  • Reduced latency in data transmission


Original Abstract Submitted

A memory device includes a memory cell array configured to store data; and a data output circuit configured to transmit status data to an external device through at least one data line in a latency period in response to a read enable signal received from the external device and transmit the data read from the memory cell array to the external device through the at least one data line in a period subsequent to the latency period.