US Patent Application 17896840. Integrated Circuit Packages and Methods of Forming the Same simplified abstract

Integrated Circuit Packages and Methods of Forming the Same

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Der-Chyang Yeh of Hsinchu (TW)

Chao-Wen Shih of Zhubei City (TW)

Sung-Feng Yeh of Taipei City (TW)

Ta Hao Sung of Yilan County (TW)

Min-Chien Hsiao of Taichung City (TW)

Chun-Chiang Kuo of Kaohsiung (TW)

Tsung-Shu Lin of New Taipei City (TW)

Integrated Circuit Packages and Methods of Forming the Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 17896840 titled 'Integrated Circuit Packages and Methods of Forming the Same

Simplified Explanation

The abstract describes a device that includes multiple integrated circuit dies and a protective cap with a gap-fill dielectric and an isolation layer.

• The device consists of a first integrated circuit die and a second integrated circuit die.
• A gap-fill dielectric is present between the first sidewall of the first integrated circuit die and the second sidewall of the second integrated circuit die.
• A protective cap overlaps the gap-fill dielectric, the first sidewall of the first integrated circuit die, and the second sidewall of the second integrated circuit die.
• An isolation layer surrounds the protective cap and is positioned on both the first integrated circuit die and the second integrated circuit die.

Original Abstract Submitted

In an embodiment, a device includes: a first integrated circuit die; a second integrated circuit die; a gap-fill dielectric between a first sidewall of the first integrated circuit die and a second sidewall of the second integrated circuit die; a protective cap overlapping the gap-fill dielectric, the first sidewall of the first integrated circuit die, and the second sidewall of the second integrated circuit die; and an isolation layer around the protective cap, the isolation layer disposed on the first integrated circuit die, and the second integrated circuit die.