Category:Szu-Wei Lu

Szu-Wei Lu

Executive Summary

Szu-Wei Lu is an inventor who has filed 9 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (3 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (9 patents). Their most frequent collaborators include (5 collaborations), (3 collaborations), (2 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L21/563 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
• H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
• H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 2 patents
• H01L23/3135 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 2 patents
• H01L24/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
• H01L21/561 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L24/96 ({the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting}): 1 patents
• H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/48 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16148 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/48229 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/95001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06544 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/1023 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/1041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/1058 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/182 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/37001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/433 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3675 (Cooling facilitated by shape of device {(): 1 patents
• H01L23/3677 (Cooling facilitated by shape of device {(): 1 patents
• H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3736 ({Metallic materials (): 1 patents
• H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
• H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29155 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29166 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29172 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/33181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/73253 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/473 (by flowing liquids {(): 1 patents
• G02B6/12004 (of the integrated circuit kind (electric integrated circuits): 1 patents
• G02B6/262 (Optical coupling means (): 1 patents
• G02B6/4239 (Coupling light guides with opto-electronic elements): 1 patents
• G02B2006/12102 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
• G02B2006/12104 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
• H01L23/49811 ({Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads (): 1 patents
• H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13144 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13155 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13139 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13164 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13111 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/16 (Fillings or auxiliary members in containers {or encapsulations}, e.g. centering rings (): 1 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/3157 ({Partial encapsulation or coating (mask layer used as insulation layer): 1 patents
• H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/74 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05624 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/74 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80203 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/808 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/49861 ({Lead-frames fixed on or encapsulated in insulating substrates (): 1 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L2224/023 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/107 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Co., Ltd.: 9 patents

Collaborators

• Chen-Hua Yu (5 collaborations)
• Tsung-Fu Tsai (3 collaborations)
• Hung-Yi Kuo (2 collaborations)
• Kuo-Chung Yee (2 collaborations)
• Chung-Shi Liu (2 collaborations)
• Chung-Ju Lee (2 collaborations)
• Yi-Jung Chen (2 collaborations)
• Ying-Ching Shih (2 collaborations)
• Chin-Chuan Chang (1 collaborations)
• Yu-Hsun Wang (1 collaborations)
• Ping-Yin Hsieh (1 collaborations)
• Pu Wang (1 collaborations)
• Li-Hui Cheng (1 collaborations)
• Yu-Jen Lien (1 collaborations)
• Ke-Han Shen (1 collaborations)
• Wei-Kong Sheng (1 collaborations)
• Chih-Ming Ke (1 collaborations)
• Cheng-Chieh Hsieh (1 collaborations)
• Jiun Yi Wu (1 collaborations)
• Jian-You Chen (1 collaborations)
• Kuan-Yu Huang (1 collaborations)
• Li-Chung Kuo (1 collaborations)
• Chen-Hsuan Tsai (1 collaborations)
• Kung-Chen Yeh (1 collaborations)
• Hsien-Ju Tsou (1 collaborations)
• Shang-Yun Hou (1 collaborations)
• Hsien-Pin Hu (1 collaborations)
• Sao-Ling Chiu (1 collaborations)
• Wen-Hsin Wei (1 collaborations)
• Ping-Kang Huang (1 collaborations)
• Chih-Ta Shen (1 collaborations)
• Wen-Chih Chiou (1 collaborations)
• Chi-Hsi Wu (1 collaborations)