Category:Yoshihisa KOJIMA: Difference between revisions

Latest revision as of 01:13, 30 March 2025

Yoshihisa KOJIMA

Executive Summary

Yoshihisa KOJIMA is an inventor who has filed 4 patents. Their primary areas of innovation include {Command handling arrangements, e.g. command buffers, queues, command scheduling} (2 patents), {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (2 patents), Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers} (1 patents), and they have worked with companies such as Kioxia Corporation (4 patents). Their most frequent collaborators include (3 collaborations), (2 collaborations), (2 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 2 patents
G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 2 patents
G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
G06F3/0647 ({Migration mechanisms}): 1 patents
G11C11/5642 ({Sensing or reading circuits; Data output circuits}): 1 patents
G11C11/5671 ({using charge trapping in an insulator}): 1 patents
G11C16/0483 ({comprising cells having several storage transistors connected in series}): 1 patents
G11C16/26 (Sensing or reading circuits; Data output circuits): 1 patents
G06F3/0619 ({in relation to data integrity, e.g. data losses, bit errors}): 1 patents
G11C16/3404 ({Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells}): 1 patents
G11C16/16 (STATIC STORES (semiconductor memory devices): 1 patents
G11C8/00 (Arrangements for selecting an address in a digital store (for stores using transistors): 1 patents
G06F12/0246 ({in block erasable memory, e.g. flash memory}): 1 patents

Companies

List of Companies

Kioxia Corporation: 4 patents

Collaborators

Suguru NISHIKAWA (3 collaborations)
Takehiko AMAKI (2 collaborations)
Shunichi IGAHARA (2 collaborations)
Toshikatsu HIDA (2 collaborations)
Marie SIA (1 collaborations)
Riki SUZUKI (1 collaborations)
Yuki KAWAGUCHI (1 collaborations)

Subcategories

This category has the following 2 subcategories, out of 2 total.

S

► Suguru NISHIKAWA‎ (2 C)

Y

► Yoshihisa KOJIMA‎ (2 C)

@@ Line 2: / Line 2: @@
 === Executive Summary ===
-Yoshihisa KOJIMA is an inventor who has filed 8 patents. Their primary areas of innovation include Address circuits; Decoders; Word-line control circuits (4 patents), Sensing or reading circuits; Data output circuits (4 patents), with means for avoiding disturbances due to temperature effects (3 patents), and they have worked with companies such as Kioxia Corporation (6 patents), KIOXIA CORPORATION (2 patents). Their most frequent collaborators include [[Category:Toshikatsu HIDA|Toshikatsu HIDA]] (3 collaborations), [[Category:Suguru NISHIKAWA|Suguru NISHIKAWA]] (2 collaborations), [[Category:Takehiko AMAKI|Takehiko AMAKI]] (2 collaborations).
+Yoshihisa KOJIMA is an inventor who has filed 4 patents. Their primary areas of innovation include {Command handling arrangements, e.g. command buffers, queues, command scheduling} (2 patents), {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (2 patents), Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers} (1 patents), and they have worked with companies such as Kioxia Corporation (4 patents). Their most frequent collaborators include [[Category:Suguru NISHIKAWA|Suguru NISHIKAWA]] (3 collaborations), [[Category:Takehiko AMAKI|Takehiko AMAKI]] (2 collaborations), [[Category:Shunichi IGAHARA|Shunichi IGAHARA]] (2 collaborations).
 === Patent Filing Activity ===
@@ Line 11: / Line 11: @@
 ==== List of Technology Areas ====
-* [[:Category:CPC_G11C16/08|G11C16/08]] (Address circuits; Decoders; Word-line control circuits): 4 patents
-* [[:Category:CPC_G11C16/26|G11C16/26]] (Sensing or reading circuits; Data output circuits): 4 patents
-* [[:Category:CPC_G11C7/04|G11C7/04]] (with means for avoiding disturbances due to temperature effects): 3 patents
-* [[:Category:CPC_G11C16/0483|G11C16/0483]] ({comprising cells having several storage transistors connected in series}): 3 patents
-* [[:Category:CPC_G06F3/0656|G06F3/0656]] ({Data buffering arrangements}): 2 patents
 * [[:Category:CPC_G06F3/0659|G06F3/0659]] ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 2 patents
 * [[:Category:CPC_G06F3/0679|G06F3/0679]] ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 2 patents
-* [[:Category:CPC_G11C16/32|G11C16/32]] (Timing circuits): 2 patents
+* [[:Category:CPC_G06F3/0604|G06F3/0604]] (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers}): 1 patents
-* [[:Category:CPC_G11C11/5628|G11C11/5628]] ({Programming or writing circuits; Data input circuits}): 2 patents
+* [[:Category:CPC_G06F3/0647|G06F3/0647]] ({Migration mechanisms}): 1 patents
-* [[:Category:CPC_G11C16/10|G11C16/10]] (Programming or data input circuits): 2 patents
+* [[:Category:CPC_G11C11/5642|G11C11/5642]] ({Sensing or reading circuits; Data output circuits}): 1 patents
-* [[:Category:CPC_G11C16/3495|G11C16/3495]] ({Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles}): 2 patents
+* [[:Category:CPC_G11C11/5671|G11C11/5671]] ({using charge trapping in an insulator}): 1 patents
-* [[:Category:CPC_G11C2211/5648|G11C2211/5648]] (STATIC STORES  (semiconductor memory devices): 2 patents
+* [[:Category:CPC_G11C16/0483|G11C16/0483]] ({comprising cells having several storage transistors connected in series}): 1 patents
+* [[:Category:CPC_G11C16/26|G11C16/26]] (Sensing or reading circuits; Data output circuits): 1 patents
 * [[:Category:CPC_G06F3/0619|G06F3/0619]] ({in relation to data integrity, e.g. data losses, bit errors}): 1 patents
-* [[:Category:CPC_G11C7/1096|G11C7/1096]] (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers): 1 patents
+* [[:Category:CPC_G11C16/3404|G11C16/3404]] ({Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells}): 1 patents
-* [[:Category:CPC_G11C7/1069|G11C7/1069]] ({I/O lines read out arrangements}): 1 patents
-* [[:Category:CPC_G11C29/52|G11C29/52]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_H10B41/27|H10B41/27]] (ELECTRONIC MEMORY DEVICES): 1 patents
-* [[:Category:CPC_G11C16/107|G11C16/107]] ({Programming all cells in an array, sector or block to the same state prior to flash erasing}): 1 patents
 * [[:Category:CPC_G11C16/16|G11C16/16]] (STATIC STORES  (semiconductor memory devices): 1 patents
-* [[:Category:CPC_H10B43/27|H10B43/27]] (ELECTRONIC MEMORY DEVICES): 1 patents
+* [[:Category:CPC_G11C8/00|G11C8/00]] (Arrangements for selecting an address in a digital store  (for stores using transistors): 1 patents
-* [[:Category:CPC_H10B43/35|H10B43/35]] (ELECTRONIC MEMORY DEVICES): 1 patents
+* [[:Category:CPC_G06F12/0246|G06F12/0246]] ({in block erasable memory, e.g. flash memory}): 1 patents
-* [[:Category:CPC_G06F3/0611|G06F3/0611]] ({in relation to response time}): 1 patents
-* [[:Category:CPC_G11C16/3459|G11C16/3459]] ({Circuits or methods to verify correct programming of nonvolatile memory cells}): 1 patents
-* [[:Category:CPC_G06F11/141|G06F11/141]] (Error detection or correction of the data by redundancy in operation  (): 1 patents
-* [[:Category:CPC_G06F11/1048|G06F11/1048]] ({using arrangements adapted for a specific error detection or correction feature}): 1 patents
-* [[:Category:CPC_G06F11/1068|G06F11/1068]] ({in sector programmable memories, e.g. flash disk  (): 1 patents
 === Companies ===
@@ Line 42: / Line 29: @@
 ==== List of Companies ====
-* Kioxia Corporation: 6 patents
+* Kioxia Corporation: 4 patents
-* KIOXIA CORPORATION: 2 patents
 === Collaborators ===
-* [[:Category:Toshikatsu HIDA|Toshikatsu HIDA]][[Category:Toshikatsu HIDA]] (3 collaborations)
+* [[:Category:Suguru NISHIKAWA|Suguru NISHIKAWA]][[Category:Suguru NISHIKAWA]] (3 collaborations)
-* [[:Category:Suguru NISHIKAWA|Suguru NISHIKAWA]][[Category:Suguru NISHIKAWA]] (2 collaborations)
 * [[:Category:Takehiko AMAKI|Takehiko AMAKI]][[Category:Takehiko AMAKI]] (2 collaborations)
-* [[:Category:Shohei ASAMI|Shohei ASAMI]][[Category:Shohei ASAMI]] (2 collaborations)
+* [[:Category:Shunichi IGAHARA|Shunichi IGAHARA]][[Category:Shunichi IGAHARA]] (2 collaborations)
-* [[:Category:Riki SUZUKI|Riki SUZUKI]][[Category:Riki SUZUKI]] (2 collaborations)
+* [[:Category:Toshikatsu HIDA|Toshikatsu HIDA]][[Category:Toshikatsu HIDA]] (2 collaborations)
-* [[:Category:Shunichi IGAHARA|Shunichi IGAHARA]][[Category:Shunichi IGAHARA]] (1 collaborations)
+* [[:Category:Marie SIA|Marie SIA]][[Category:Marie SIA]] (1 collaborations)
-* [[:Category:Marie Grace Izabelle Angeles SIA|Marie Grace Izabelle Angeles SIA]][[Category:Marie Grace Izabelle Angeles SIA]] (1 collaborations)
+* [[:Category:Riki SUZUKI|Riki SUZUKI]][[Category:Riki SUZUKI]] (1 collaborations)
-* [[:Category:Masanobu SHIRAKAWA|Masanobu SHIRAKAWA]][[Category:Masanobu SHIRAKAWA]] (1 collaborations)
+* [[:Category:Yuki KAWAGUCHI|Yuki KAWAGUCHI]][[Category:Yuki KAWAGUCHI]] (1 collaborations)
-* [[:Category:Kiyotaka IWASAKI|Kiyotaka IWASAKI]][[Category:Kiyotaka IWASAKI]] (1 collaborations)
-* [[:Category:Dongxiao YU|Dongxiao YU]][[Category:Dongxiao YU]] (1 collaborations)
-* [[:Category:Masahiro KIYOOKA|Masahiro KIYOOKA]][[Category:Masahiro KIYOOKA]] (1 collaborations)
 [[Category:Yoshihisa KOJIMA]]
 [[Category:Inventors]]
 [[Category:Inventors filing patents with Kioxia Corporation]]
-[[Category:Inventors filing patents with KIOXIA CORPORATION]]