Advanced micro devices, inc. (20250006722). INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES: Difference between revisions
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==Inventor(s)== | ==Inventor(s)== | ||
[[:Category:Ravi Kumar Kallempudi of Bengaluru | [[:Category:Ravi Kumar Kallempudi of Bengaluru IN|Ravi Kumar Kallempudi of Bengaluru IN]][[Category:Ravi Kumar Kallempudi of Bengaluru IN]] | ||
[[:Category:Robert Scott Ruth of Fort Collins CO | [[:Category:Robert Scott Ruth of Fort Collins CO US|Robert Scott Ruth of Fort Collins CO US]][[Category:Robert Scott Ruth of Fort Collins CO US]] | ||
[[:Category:Suhas Shivaram of Bengaluru | [[:Category:Suhas Shivaram of Bengaluru IN|Suhas Shivaram of Bengaluru IN]][[Category:Suhas Shivaram of Bengaluru IN]] | ||
==INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES== | ==INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES== | ||
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This abstract first appeared for US patent application 20250006722 titled 'INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES | This abstract first appeared for US patent application 20250006722 titled 'INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES | ||
==Original Abstract Submitted== | ==Original Abstract Submitted== |
Latest revision as of 04:06, 25 March 2025
INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES
Organization Name
Inventor(s)
Ravi Kumar Kallempudi of Bengaluru IN
Robert Scott Ruth of Fort Collins CO US
Suhas Shivaram of Bengaluru IN
INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES
This abstract first appeared for US patent application 20250006722 titled 'INTEGRATED CIRCUIT LOW CAPACITANCE ELECTROSTATIC DISCHARGE DIODES
Original Abstract Submitted
a semiconductor electrostatic discharge (esd) protection circuit comprises an n diode for limiting negative going voltages with reference to ground (v) and a p diode for limiting positive going voltages with reference to a positive supply voltage (v). the n-diode is formed in a single p-well surrounded by an n-well ring. the p-diode is formed in a single n-well surrounded by a p-well ring. the n-diode comprises a plurality of n+ fingers, each n+ finger is surrounded by a p+ guard ring. the p-diode comprises a plurality of p+ fingers, each p+ finger surrounded by an n+ guard ring. the plurality of n+ fingers and p+ fingers are coupled to an input-output pad. the p+ guard rings are coupled to ground (v) and the n+ guard rings are coupled to the positive supply voltage (v).
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