Samsung electronics co., ltd. (20250062241). SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS: Difference between revisions
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[[Category:samsung electronics co., ltd.]] | [[Category:samsung electronics co., ltd.]] | ||
==Inventor(s)== | |||
[[:Category:Kyungdon Mun of Suwon-si (KR)|Kyungdon Mun of Suwon-si (KR)]][[Category:Kyungdon Mun of Suwon-si (KR)]] | |||
[[:Category:Jihwang Kim of Suwon-si (KR)|Jihwang Kim of Suwon-si (KR)]][[Category:Jihwang Kim of Suwon-si (KR)]] | |||
[[:Category:Sangjin Baek of Suwon-si (KR)|Sangjin Baek of Suwon-si (KR)]][[Category:Sangjin Baek of Suwon-si (KR)]] | |||
[[:Category:Kuwon Lee of Suwon-si (KR)|Kuwon Lee of Suwon-si (KR)]][[Category:Kuwon Lee of Suwon-si (KR)]] | |||
==SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS== | |||
This abstract first appeared for US patent application 20250062241 titled 'SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS | |||
==Original Abstract Submitted== | |||
a semiconductor package includes: a first substrate; a bridge chip disposed on the first substrate and having a first region and a second region; an upper semiconductor chip disposed on the first region of the bridge chip; and conductive posts disposed on the second region of the bridge chip and spaced apart from the upper semiconductor chip, wherein the upper semiconductor chip is electrically connected to the conductive posts through the bridge chip. | |||
[[Category:H01L23/538]] | |||
[[Category:H01L23/00]] | |||
[[Category:H01L23/31]] | |||
[[Category:H01L23/367]] | |||
[[Category:H01L23/427]] | |||
[[Category:H01L25/18]] | |||
[[Category:H10B80/00]] | |||
[[Category:CPC_H01L23/5386]] | |||
Latest revision as of 03:57, 19 March 2025
SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS
This abstract first appeared for US patent application 20250062241 titled 'SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS
Original Abstract Submitted
a semiconductor package includes: a first substrate; a bridge chip disposed on the first substrate and having a first region and a second region; an upper semiconductor chip disposed on the first region of the bridge chip; and conductive posts disposed on the second region of the bridge chip and spaced apart from the upper semiconductor chip, wherein the upper semiconductor chip is electrically connected to the conductive posts through the bridge chip.