Jump to content

Micron technology, inc. (20250069676). PREDICTIVE PROGRAM VERIFICATION: Difference between revisions

From WikiPatents
Creating a new page
 
Creating a new page
 
Line 8: Line 8:


[[Category:micron technology, inc.]]
[[Category:micron technology, inc.]]
==Inventor(s)==
[[:Category:Jungmi Ko of Santa Clara CA (US)|Jungmi Ko of Santa Clara CA (US)]][[Category:Jungmi Ko of Santa Clara CA (US)]]
[[:Category:Junghwan Lee of Cupertino CA (US)|Junghwan Lee of Cupertino CA (US)]][[Category:Junghwan Lee of Cupertino CA (US)]]
[[:Category:Byungkwan Jeong of San Jose CA (US)|Byungkwan Jeong of San Jose CA (US)]][[Category:Byungkwan Jeong of San Jose CA (US)]]
[[:Category:Kwangho Baek of Sunnyvale CA (US)|Kwangho Baek of Sunnyvale CA (US)]][[Category:Kwangho Baek of Sunnyvale CA (US)]]
[[:Category:Seong Je Park of San Jose CA (US)|Seong Je Park of San Jose CA (US)]][[Category:Seong Je Park of San Jose CA (US)]]
==PREDICTIVE PROGRAM VERIFICATION==
This abstract first appeared for US patent application 20250069676 titled 'PREDICTIVE PROGRAM VERIFICATION
==Original Abstract Submitted==
a memory array comprises a plurality of memory cells. control logic coupled to the memory array can cause a program voltage to be applied to a subset of the plurality of memory cells to be programmed to a specified logical level, where the specified logical level is associated with a group of logical levels. the control logic can cause a first program verify voltage associated with the group of logical levels to be applied to the memory cells. the control logic can decrement a count associated with the group of logical levels, where the count indicates a number of remaining program voltages to be applied for programming the subset of memory cells to a logical level of the predefined group of logical levels and terminate the program operation for the subset of plurality of memory cells responsive to determine that the count falls below a threshold value.
[[Category:G11C16/34]]
[[Category:G11C16/10]]
[[Category:G11C16/24]]
[[Category:CPC_G11C16/3459]]

Latest revision as of 08:27, 17 March 2025

PREDICTIVE PROGRAM VERIFICATION

Organization Name

micron technology, inc.

Inventor(s)

Jungmi Ko of Santa Clara CA (US)

Junghwan Lee of Cupertino CA (US)

Byungkwan Jeong of San Jose CA (US)

Kwangho Baek of Sunnyvale CA (US)

Seong Je Park of San Jose CA (US)

PREDICTIVE PROGRAM VERIFICATION

This abstract first appeared for US patent application 20250069676 titled 'PREDICTIVE PROGRAM VERIFICATION

Original Abstract Submitted

a memory array comprises a plurality of memory cells. control logic coupled to the memory array can cause a program voltage to be applied to a subset of the plurality of memory cells to be programmed to a specified logical level, where the specified logical level is associated with a group of logical levels. the control logic can cause a first program verify voltage associated with the group of logical levels to be applied to the memory cells. the control logic can decrement a count associated with the group of logical levels, where the count indicates a number of remaining program voltages to be applied for programming the subset of memory cells to a logical level of the predefined group of logical levels and terminate the program operation for the subset of plurality of memory cells responsive to determine that the count falls below a threshold value.

(Ad) Transform your business with AI in minutes, not months

Custom AI strategy tailored to your specific industry needs
Step-by-step implementation with measurable ROI
5-minute setup that requires zero technical skills
Get your AI playbook

Trusted by 1,000+ companies worldwide

Cookies help us deliver our services. By using our services, you agree to our use of cookies.