Difference between revisions of "CHANGXIN MEMORY TECHNOLOGIES, INC. patent applications published on November 30th, 2023"
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− | + | ==Patent applications for CHANGXIN MEMORY TECHNOLOGIES, INC. on November 30th, 2023== | |
+ | |||
+ | ===PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE ([[US Patent Application 17951625. PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17951625]])=== | ||
+ | |||
− | + | '''Main Inventor''' | |
− | + | Honglong SHI | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | + | ===METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT ([[US Patent Application 17872479. METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17872479]])=== | |
− | |||
− | |||
− | |||
+ | '''Main Inventor''' | ||
+ | Zengquan WU | ||
− | ==Patent | + | |
+ | ===DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY ([[US Patent Application 18448891. DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448891]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yinchuan GU | ||
+ | |||
+ | |||
+ | ===METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM ([[US Patent Application 17899056. METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17899056]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yu LI | ||
+ | |||
+ | |||
+ | ===METHOD AND APPARATUS FOR CHECKING SIGNAL LINE ([[US Patent Application 17898727. METHOD AND APPARATUS FOR CHECKING SIGNAL LINE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17898727]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Min MIN | ||
+ | |||
+ | |||
+ | ===TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY ([[US Patent Application 18169159. TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18169159]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Kangling JI | ||
+ | |||
+ | |||
+ | ===REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE ([[US Patent Application 18332706. REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18332706]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yinchuan GU | ||
+ | |||
+ | |||
+ | ===REFRESH ADDRESS GENERATION CIRCUIT ([[US Patent Application 18153312. REFRESH ADDRESS GENERATION CIRCUIT simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18153312]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yinchuan GU | ||
+ | |||
+ | |||
+ | ===REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD ([[US Patent Application 18157558. REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18157558]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Liang ZHANG | ||
+ | |||
+ | |||
+ | ===SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY ([[US Patent Application 18449060. SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18449060]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Zequn HUANG | ||
+ | |||
+ | |||
+ | ===POWER SUPPLY SWITCHING CIRCUIT AND MEMORY ([[US Patent Application 18327062. POWER SUPPLY SWITCHING CIRCUIT AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18327062]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yupeng FAN | ||
+ | |||
+ | |||
+ | ===SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY ([[US Patent Application 18448897. SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448897]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Zequn HUANG | ||
+ | |||
+ | |||
+ | ===METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE ([[US Patent Application 17868774. METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17868774]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Xikun CHU | ||
+ | |||
+ | |||
+ | ===ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY ([[US Patent Application 17929747. ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17929747]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Chuangming HOU | ||
+ | |||
+ | |||
+ | ===CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL ([[US Patent Application 18448340. CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448340]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Kai TIAN | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17815623. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17815623]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yi TANG | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18167024. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18167024]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Peimeng WANG | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17887775. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17887775]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yongxiang LI | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18163135. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18163135]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF ([[US Patent Application 17878046. SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17878046]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Xiaojie LI | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 18150885. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18150885]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yang CHEN | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18093779. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18093779]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Xiaojie LI | ||
+ | |||
+ | |||
+ | ===METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE ([[US Patent Application 18446507. METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18446507]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Xiaoling WANG | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816130. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816130]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY ([[US Patent Application 18363901. MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363901]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yizhi ZENG | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18446514. SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18446514]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Shuai GUO | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE ([[US Patent Application 17879913. SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17879913]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Jianfeng XIAO | ||
+ | |||
+ | |||
+ | ===TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 17816156. TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816156]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 17816435. TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816435]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816436. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816436]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE ([[US Patent Application 17929842. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17929842]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Yi TANG | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17813409. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17813409]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Youming Liu | ||
+ | |||
+ | |||
+ | ===MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME ([[US Patent Application 17885727. MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17885727]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Jingwen LU | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME ([[US Patent Application 18151360. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18151360]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Kanyu CAO | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME ([[US Patent Application 17899684. SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17899684]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Min LI | ||
+ | |||
+ | |||
+ | ===TRANSISTOR, MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 18151434. TRANSISTOR, MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18151434]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | CHUN-WEI LIAO | ||
+ | |||
+ | |||
+ | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY ([[US Patent Application 18363819. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363819]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Jingwen LU | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816438. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816438]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | YOUMING LIU | ||
+ | |||
+ | |||
+ | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE ([[US Patent Application 18363833. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363833]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Jingwen LU | ||
+ | |||
+ | |||
+ | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME ([[US Patent Application 18169839. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18169839]])=== | ||
+ | |||
+ | |||
+ | '''Main Inventor''' | ||
+ | |||
+ | Chao LIN |
Revision as of 08:48, 6 December 2023
Contents
- 1 Patent applications for CHANGXIN MEMORY TECHNOLOGIES, INC. on November 30th, 2023
- 1.1 PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE (17951625)
- 1.2 METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT (17872479)
- 1.3 DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY (18448891)
- 1.4 METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM (17899056)
- 1.5 METHOD AND APPARATUS FOR CHECKING SIGNAL LINE (17898727)
- 1.6 TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY (18169159)
- 1.7 REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE (18332706)
- 1.8 REFRESH ADDRESS GENERATION CIRCUIT (18153312)
- 1.9 REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD (18157558)
- 1.10 SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY (18449060)
- 1.11 POWER SUPPLY SWITCHING CIRCUIT AND MEMORY (18327062)
- 1.12 SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY (18448897)
- 1.13 METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE (17868774)
- 1.14 ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY (17929747)
- 1.15 CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL (18448340)
- 1.16 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17815623)
- 1.17 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18167024)
- 1.18 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17887775)
- 1.19 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18163135)
- 1.20 SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF (17878046)
- 1.21 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (18150885)
- 1.22 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18093779)
- 1.23 METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE (18446507)
- 1.24 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17816130)
- 1.25 MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY (18363901)
- 1.26 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE (18446514)
- 1.27 SEMICONDUCTOR STRUCTURE (17879913)
- 1.28 TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY (17816156)
- 1.29 TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY (17816435)
- 1.30 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17816436)
- 1.31 METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE (17929842)
- 1.32 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17813409)
- 1.33 MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME (17885727)
- 1.34 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME (18151360)
- 1.35 SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME (17899684)
- 1.36 TRANSISTOR, MANUFACTURING METHOD THEREOF, AND MEMORY (18151434)
- 1.37 METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY (18363819)
- 1.38 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17816438)
- 1.39 METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE (18363833)
- 1.40 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME (18169839)
Patent applications for CHANGXIN MEMORY TECHNOLOGIES, INC. on November 30th, 2023
PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE (17951625)
Main Inventor
Honglong SHI
METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT (17872479)
Main Inventor
Zengquan WU
DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY (18448891)
Main Inventor
Yinchuan GU
METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM (17899056)
Main Inventor
Yu LI
METHOD AND APPARATUS FOR CHECKING SIGNAL LINE (17898727)
Main Inventor
Min MIN
TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY (18169159)
Main Inventor
Kangling JI
REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE (18332706)
Main Inventor
Yinchuan GU
REFRESH ADDRESS GENERATION CIRCUIT (18153312)
Main Inventor
Yinchuan GU
REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD (18157558)
Main Inventor
Liang ZHANG
SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY (18449060)
Main Inventor
Zequn HUANG
POWER SUPPLY SWITCHING CIRCUIT AND MEMORY (18327062)
Main Inventor
Yupeng FAN
SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY (18448897)
Main Inventor
Zequn HUANG
METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE (17868774)
Main Inventor
Xikun CHU
ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY (17929747)
Main Inventor
Chuangming HOU
CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL (18448340)
Main Inventor
Kai TIAN
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17815623)
Main Inventor
Yi TANG
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18167024)
Main Inventor
Peimeng WANG
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17887775)
Main Inventor
Yongxiang LI
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18163135)
Main Inventor
YOUMING LIU
SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF (17878046)
Main Inventor
Xiaojie LI
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (18150885)
Main Inventor
Yang CHEN
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (18093779)
Main Inventor
Xiaojie LI
METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE (18446507)
Main Inventor
Xiaoling WANG
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17816130)
Main Inventor
YOUMING LIU
MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY (18363901)
Main Inventor
Yizhi ZENG
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE (18446514)
Main Inventor
Shuai GUO
SEMICONDUCTOR STRUCTURE (17879913)
Main Inventor
Jianfeng XIAO
TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY (17816156)
Main Inventor
YOUMING LIU
TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY (17816435)
Main Inventor
YOUMING LIU
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17816436)
Main Inventor
YOUMING LIU
METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE (17929842)
Main Inventor
Yi TANG
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17813409)
Main Inventor
Youming Liu
MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME (17885727)
Main Inventor
Jingwen LU
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