Difference between revisions of "Category:Chih-Hao WANG"

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=== Executive Summary ===
 
=== Executive Summary ===
Chih-Hao WANG is an inventor who has filed 11 patents. Their primary areas of innovation include {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (7 patents), TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (4 patents). Their most frequent collaborators include [[Category:Kuo-Cheng CHIANG|Kuo-Cheng CHIANG]] (5 collaborations), [[Category:Lung-Kun CHU|Lung-Kun CHU]] (3 collaborations), [[Category:Jia-Ni YU|Jia-Ni YU]] (3 collaborations).
+
Chih-Hao WANG is an inventor who has filed 34 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (21 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (19 patents), {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (17 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (18 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (16 patents). Their most frequent collaborators include [[Category:Kuo-Cheng CHIANG|Kuo-Cheng CHIANG]] (19 collaborations), [[Category:Lin-Yu HUANG|Lin-Yu HUANG]] (10 collaborations), [[Category:Huan-Chieh SU|Huan-Chieh SU]] (9 collaborations).
  
 
=== Patent Filing Activity ===
 
=== Patent Filing Activity ===
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==== List of Technology Areas ====
 
==== List of Technology Areas ====
* [[:Category:CPC_H01L29/66545|H01L29/66545]] ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 5 patents
+
* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 21 patents
* [[:Category:CPC_H01L29/78696|H01L29/78696]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
+
* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 19 patents
* [[:Category:CPC_H01L27/0886|H01L27/0886]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
+
* [[:Category:CPC_H01L29/66545|H01L29/66545]] ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 17 patents
* [[:Category:CPC_H01L29/66795|H01L29/66795]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
+
* [[:Category:CPC_H01L29/78696|H01L29/78696]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 16 patents
* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L21/823431|H01L21/823431]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 12 patents
* [[:Category:CPC_H01L29/66439|H01L29/66439]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L29/66439|H01L29/66439]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 11 patents
* [[:Category:CPC_H01L21/823878|H01L21/823878]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
+
* [[:Category:CPC_H01L29/0847|H01L29/0847]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 9 patents
* [[:Category:CPC_H01L29/41791|H01L29/41791]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L21/823418|H01L21/823418]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 8 patents
* [[:Category:CPC_H01L29/401|H01L29/401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L21/823412|H01L21/823412]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 7 patents
* [[:Category:CPC_H01L21/823431|H01L21/823431]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
+
* [[:Category:CPC_H01L21/823481|H01L21/823481]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 7 patents
* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L27/0886|H01L27/0886]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
* [[:Category:CPC_H01L21/823871|H01L21/823871]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
+
* [[:Category:CPC_H01L29/66795|H01L29/66795]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L29/41791|H01L29/41791]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
* [[:Category:CPC_H01L29/0665|H01L29/0665]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L29/401|H01L29/401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L29/785|H01L29/785]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L29/0649|H01L29/0649]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L21/0228|H01L21/0228]] ({deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD}): 2 patents
+
* [[:Category:CPC_H01L29/66742|H01L29/66742]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
* [[:Category:CPC_H01L21/31111|H01L21/31111]] ({by chemical means}): 2 patents
+
* [[:Category:CPC_H01L29/66553|H01L29/66553]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 4 patents
* [[:Category:CPC_H01L27/0924|H01L27/0924]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L21/823475|H01L21/823475]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
* [[:Category:CPC_H01L29/0847|H01L29/0847]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L29/785|H01L29/785]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
 +
* [[:Category:CPC_H01L29/6653|H01L29/6653]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 4 patents
 +
* [[:Category:CPC_H01L21/823807|H01L21/823807]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
 +
* [[:Category:CPC_H01L21/823814|H01L21/823814]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
 +
* [[:Category:CPC_H01L27/092|H01L27/092]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L27/088|H01L27/088]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L21/02603|H01L21/02603]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L21/823437|H01L21/823437]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
 +
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L29/6656|H01L29/6656]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 3 patents
 +
* [[:Category:CPC_H01L21/76224|H01L21/76224]] ({using trench refilling with dielectric materials  (trench filling with polycristalline silicon): 3 patents
 +
* [[:Category:CPC_H01L21/28088|H01L21/28088]] (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 2 patents
 +
* [[:Category:CPC_H01L21/823878|H01L21/823878]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
 +
* [[:Category:CPC_H01L21/823828|H01L21/823828]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
 +
* [[:Category:CPC_H01L21/764|H01L21/764]] (Making of isolation regions between components): 2 patents
 +
* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 2 patents
 +
* [[:Category:CPC_H01L29/78618|H01L29/78618]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L29/7853|H01L29/7853]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L29/7848|H01L29/7848]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 
* [[:Category:CPC_H01L29/7851|H01L29/7851]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 
* [[:Category:CPC_H01L29/7851|H01L29/7851]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L29/66636|H01L29/66636]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L21/823468|H01L21/823468]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
* [[:Category:CPC_H01L21/76224|H01L21/76224]] ({using trench refilling with dielectric materials  (trench filling with polycristalline silicon): 2 patents
+
* [[:Category:CPC_H01L21/32139|H01L21/32139]] ({using masks}): 2 patents
* [[:Category:CPC_H01L21/823418|H01L21/823418]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
+
* [[:Category:CPC_H01L21/76843|H01L21/76843]] ({formed in openings in a dielectric}): 2 patents
* [[:Category:CPC_H01L27/092|H01L27/092]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L21/31105|H01L21/31105]] ({Etching inorganic layers}): 2 patents
* [[:Category:CPC_H01L21/823807|H01L21/823807]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
+
* [[:Category:CPC_H01L21/823842|H01L21/823842]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/76232|H01L21/76232]] (Dielectric regions {, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers}): 1 patents
+
* [[:Category:CPC_H01L29/4908|H01L29/4908]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L21/764|H01L21/764]] (Making of isolation regions between components): 1 patents
 
* [[:Category:CPC_H01L21/7682|H01L21/7682]] (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
 
* [[:Category:CPC_H01L21/76843|H01L21/76843]] ({formed in openings in a dielectric}): 1 patents
 
* [[:Category:CPC_H01L21/823821|H01L21/823821]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 
* [[:Category:CPC_H01L27/0883|H01L27/0883]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/823412|H01L21/823412]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 
* [[:Category:CPC_H01L21/823462|H01L21/823462]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 
* [[:Category:CPC_H01L29/0649|H01L29/0649]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2029/7858|H01L2029/7858]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/41725|H01L29/41725]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/76802|H01L21/76802]] (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
 
* [[:Category:CPC_H01L21/76877|H01L21/76877]] ({Thin films associated with contacts of capacitors}): 1 patents
 
* [[:Category:CPC_H01L21/28556|H01L21/28556]] (from a gas or vapour, e.g. condensation): 1 patents
 
* [[:Category:CPC_H01L21/32137|H01L21/32137]] ({of silicon-containing layers}): 1 patents
 
* [[:Category:CPC_H01L21/76898|H01L21/76898]] ({formed through a semiconductor substrate}): 1 patents
 
* [[:Category:CPC_H01L23/481|H01L23/481]] (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
 
 
* [[:Category:CPC_H01L29/41733|H01L29/41733]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/41733|H01L29/41733]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L29/66742|H01L29/66742]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L21/823857|H01L21/823857]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/76871|H01L21/76871]] ({Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers}): 1 patents
+
* [[:Category:CPC_H01L21/28123|H01L21/28123]] ({Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects}): 1 patents
* [[:Category:CPC_H01L29/6656|H01L29/6656]] ({using self aligned silicidation, i.e. salicide  (formation of conductive layers comprising silicides): 1 patents
+
* [[:Category:CPC_H01L21/76829|H01L21/76829]] ({characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}): 1 patents
* [[:Category:CPC_H01L29/517|H01L29/517]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/31116|H01L21/31116]] ({by dry-etching}): 1 patents
 
* [[:Category:CPC_H01L21/823437|H01L21/823437]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 
* [[:Category:CPC_H01L21/823481|H01L21/823481]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 
* [[:Category:CPC_H01L27/0207|H01L27/0207]] ({Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique}): 1 patents
 
* [[:Category:CPC_H01L29/7848|H01L29/7848]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/0217|H01L21/0217]] ({the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz  (): 1 patents
 
* [[:Category:CPC_H01L21/02271|H01L21/02271]] ({deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition  (): 1 patents
 
* [[:Category:CPC_H01L21/0274|H01L21/0274]] (Making masks on semiconductor bodies for further photolithographic processing not provided for in group): 1 patents
 
* [[:Category:CPC_H01L21/0332|H01L21/0332]] (comprising inorganic layers): 1 patents
 
* [[:Category:CPC_H01L21/31053|H01L21/31053]] ({involving a dielectric removal step}): 1 patents
 
* [[:Category:CPC_H01L21/32139|H01L21/32139]] ({using masks}): 1 patents
 
* [[:Category:CPC_H01L29/165|H01L29/165]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/205|H01L29/205]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
 
* [[:Category:CPC_H01L21/76897|H01L21/76897]] ({Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step  (self-aligned silicidation on field effect transistors): 1 patents
 
* [[:Category:CPC_H01L21/76897|H01L21/76897]] ({Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step  (self-aligned silicidation on field effect transistors): 1 patents
* [[:Category:CPC_H01L21/823468|H01L21/823468]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
+
* [[:Category:CPC_H01L21/823456|H01L21/823456]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L21/823475|H01L21/823475]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
+
* [[:Category:CPC_H01L29/0653|H01L29/0653]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 1 patents
+
* [[:Category:CPC_H01L27/0922|H01L27/0922]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/5286|H01L23/5286]] ({Geometry or} layout of the interconnection structure {(): 1 patents
 
* [[:Category:CPC_H01L29/4175|H01L29/4175]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
 
* [[:Category:CPC_H01L29/6681|H01L29/6681]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/6681|H01L29/6681]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/45|H01L29/45]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/02532|H01L21/02532]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/32134|H01L21/32134]] ({by liquid etching only}): 1 patents
 +
* [[:Category:CPC_H01L29/66636|H01L29/66636]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/02164|H01L21/02164]] ({the material being a silicon oxide, e.g. SiO): 1 patents
 +
* [[:Category:CPC_H01L21/31116|H01L21/31116]] ({by dry-etching}): 1 patents
 +
* [[:Category:CPC_H01L21/28562|H01L21/28562]] (from a gas or vapour, e.g. condensation): 1 patents
 +
* [[:Category:CPC_H01L21/76816|H01L21/76816]] ({Aspects relating to the layout of the pattern or to the size of vias or trenches  (layout of the interconnections per se): 1 patents
 +
* [[:Category:CPC_H01L21/76852|H01L21/76852]] ({the layer also covering the sidewalls of the conductive structure}): 1 patents
 +
* [[:Category:CPC_H01L21/76879|H01L21/76879]] ({by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating  (plating on semiconductors in general): 1 patents
 +
* [[:Category:CPC_H01L29/0665|H01L29/0665]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/28575|H01L21/28575]] (from a gas or vapour, e.g. condensation): 1 patents
 +
* [[:Category:CPC_H01L21/30604|H01L21/30604]] (Chemical or electrical treatment, e.g. electrolytic etching  (to form insulating layers): 1 patents
 +
* [[:Category:CPC_H01L27/0928|H01L27/0928]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/823892|H01L21/823892]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 +
* [[:Category:CPC_H01L23/481|H01L23/481]] (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
 +
* [[:Category:CPC_H01L21/76898|H01L21/76898]] ({formed through a semiconductor substrate}): 1 patents
 +
* [[:Category:CPC_H01L27/1108|H01L27/1108]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L27/1104|H01L27/1104]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/32137|H01L21/32137]] ({of silicon-containing layers}): 1 patents
 +
* [[:Category:CPC_H01L27/11|H01L27/11]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/7854|H01L29/7854]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/66787|H01L29/66787]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/0642|H01L29/0642]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_B82Y40/00|B82Y40/00]] (Manufacture or treatment of nanostructures): 1 patents
 +
* [[:Category:CPC_H01L29/42376|H01L29/42376]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/7856|H01L29/7856]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L27/1207|H01L27/1207]] ({combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits}): 1 patents
 +
* [[:Category:CPC_H01L21/8221|H01L21/8221]] ({Three dimensional integrated circuits stacked in different levels}): 1 patents
 +
* [[:Category:CPC_H01L27/0924|H01L27/0924]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/4966|H01L29/4966]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L29/517|H01L29/517]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/3086|H01L21/3086]] ({characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment}): 1 patents
 +
* [[:Category:CPC_H01L21/823864|H01L21/823864]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
 +
* [[:Category:CPC_H01L21/823821|H01L21/823821]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  
 
=== Companies ===
 
=== Companies ===
Line 84: Line 105:
  
 
==== List of Companies ====
 
==== List of Companies ====
* Taiwan Semiconductor Manufacturing Co., Ltd.: 7 patents
+
* Taiwan Semiconductor Manufacturing Company, Ltd.: 18 patents
* TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.: 4 patents
+
* TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 16 patents
  
 
=== Collaborators ===
 
=== Collaborators ===
* [[:Category:Kuo-Cheng CHIANG|Kuo-Cheng CHIANG]][[Category:Kuo-Cheng CHIANG]] (5 collaborations)
+
* [[:Category:Kuo-Cheng CHIANG|Kuo-Cheng CHIANG]][[Category:Kuo-Cheng CHIANG]] (19 collaborations)
* [[:Category:Lung-Kun CHU|Lung-Kun CHU]][[Category:Lung-Kun CHU]] (3 collaborations)
+
* [[:Category:Lin-Yu HUANG|Lin-Yu HUANG]][[Category:Lin-Yu HUANG]] (10 collaborations)
 +
* [[:Category:Huan-Chieh SU|Huan-Chieh SU]][[Category:Huan-Chieh SU]] (9 collaborations)
 +
* [[:Category:Shi-Ning JU|Shi-Ning JU]][[Category:Shi-Ning JU]] (8 collaborations)
 +
* [[:Category:Kuan-Lun CHENG|Kuan-Lun CHENG]][[Category:Kuan-Lun CHENG]] (8 collaborations)
 +
* [[:Category:Guan-Lin CHEN|Guan-Lin CHEN]][[Category:Guan-Lin CHEN]] (6 collaborations)
 +
* [[:Category:Shi Ning JU|Shi Ning JU]][[Category:Shi Ning JU]] (6 collaborations)
 +
* [[:Category:Kuan-Ting PAN|Kuan-Ting PAN]][[Category:Kuan-Ting PAN]] (5 collaborations)
 +
* [[:Category:Chun-Yuan CHEN|Chun-Yuan CHEN]][[Category:Chun-Yuan CHEN]] (4 collaborations)
 +
* [[:Category:Jung-Chien CHENG|Jung-Chien CHENG]][[Category:Jung-Chien CHENG]] (4 collaborations)
 +
* [[:Category:Li-Zhen YU|Li-Zhen YU]][[Category:Li-Zhen YU]] (4 collaborations)
 +
* [[:Category:Lo-Heng CHANG|Lo-Heng CHANG]][[Category:Lo-Heng CHANG]] (4 collaborations)
 
* [[:Category:Jia-Ni YU|Jia-Ni YU]][[Category:Jia-Ni YU]] (3 collaborations)
 
* [[:Category:Jia-Ni YU|Jia-Ni YU]][[Category:Jia-Ni YU]] (3 collaborations)
 
* [[:Category:Mao-Lin HUANG|Mao-Lin HUANG]][[Category:Mao-Lin HUANG]] (3 collaborations)
 
* [[:Category:Mao-Lin HUANG|Mao-Lin HUANG]][[Category:Mao-Lin HUANG]] (3 collaborations)
* [[:Category:Kuan-Lun CHENG|Kuan-Lun CHENG]][[Category:Kuan-Lun CHENG]] (3 collaborations)
+
* [[:Category:Lung-Kun CHU|Lung-Kun CHU]][[Category:Lung-Kun CHU]] (3 collaborations)
* [[:Category:Chun-Fu LU|Chun-Fu LU]][[Category:Chun-Fu LU]] (2 collaborations)
+
* [[:Category:Chung-Wei HSU|Chung-Wei HSU]][[Category:Chung-Wei HSU]] (3 collaborations)
* [[:Category:Chung-Wei HSU|Chung-Wei HSU]][[Category:Chung-Wei HSU]] (2 collaborations)
+
* [[:Category:Chun-Fu LU|Chun-Fu LU]][[Category:Chun-Fu LU]] (3 collaborations)
* [[:Category:Kuo-Cheng CHING|Kuo-Cheng CHING]][[Category:Kuo-Cheng CHING]] (2 collaborations)
+
* [[:Category:Jia-Chuan YOU|Jia-Chuan YOU]][[Category:Jia-Chuan YOU]] (3 collaborations)
 +
* [[:Category:Chia-Hao CHANG|Chia-Hao CHANG]][[Category:Chia-Hao CHANG]] (3 collaborations)
 +
* [[:Category:Yu-Ming LIN|Yu-Ming LIN]][[Category:Yu-Ming LIN]] (3 collaborations)
 +
* [[:Category:Cheng-Chi CHUANG|Cheng-Chi CHUANG]][[Category:Cheng-Chi CHUANG]] (3 collaborations)
 +
* [[:Category:Yu-Xuan HUANG|Yu-Xuan HUANG]][[Category:Yu-Xuan HUANG]] (3 collaborations)
 +
* [[:Category:Tien-Lu LIN|Tien-Lu LIN]][[Category:Tien-Lu LIN]] (2 collaborations)
 +
* [[:Category:Meng-Huan JAO|Meng-Huan JAO]][[Category:Meng-Huan JAO]] (2 collaborations)
 +
* [[:Category:Yi-Ruei JHAN|Yi-Ruei JHAN]][[Category:Yi-Ruei JHAN]] (2 collaborations)
 
* [[:Category:Ching-Wei TSAI|Ching-Wei TSAI]][[Category:Ching-Wei TSAI]] (2 collaborations)
 
* [[:Category:Ching-Wei TSAI|Ching-Wei TSAI]][[Category:Ching-Wei TSAI]] (2 collaborations)
* [[:Category:Chia-Hao CHANG|Chia-Hao CHANG]][[Category:Chia-Hao CHANG]] (2 collaborations)
+
* [[:Category:Jung-Hung CHANG|Jung-Hung CHANG]][[Category:Jung-Hung CHANG]] (2 collaborations)
* [[:Category:Yu-Ming LIN|Yu-Ming LIN]][[Category:Yu-Ming LIN]] (2 collaborations)
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* [[:Category:Sheng-Tsung WANG|Sheng-Tsung WANG]][[Category:Sheng-Tsung WANG]] (2 collaborations)
* [[:Category:Shi Ning JU|Shi Ning JU]][[Category:Shi Ning JU]] (2 collaborations)
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* [[:Category:Wang-Chun HUANG|Wang-Chun HUANG]][[Category:Wang-Chun HUANG]] (2 collaborations)
 +
* [[:Category:Hou-Yu CHEN|Hou-Yu CHEN]][[Category:Hou-Yu CHEN]] (2 collaborations)
 +
* [[:Category:Bo-Rong LIN|Bo-Rong LIN]][[Category:Bo-Rong LIN]] (2 collaborations)
 +
* [[:Category:Jin CAI|Jin CAI]][[Category:Jin CAI]] (1 collaborations)
 +
* [[:Category:Shih-Chuan CHIU|Shih-Chuan CHIU]][[Category:Shih-Chuan CHIU]] (1 collaborations)
 +
* [[:Category:Pei-Yu WANG|Pei-Yu WANG]][[Category:Pei-Yu WANG]] (1 collaborations)
 +
* [[:Category:Cheng-Ting CHUNG|Cheng-Ting CHUNG]][[Category:Cheng-Ting CHUNG]] (1 collaborations)
 +
* [[:Category:Min CAO|Min CAO]][[Category:Min CAO]] (1 collaborations)
 +
* [[:Category:Pei-Hsun WANG|Pei-Hsun WANG]][[Category:Pei-Hsun WANG]] (1 collaborations)
 +
* [[:Category:Yun-Ju FAN|Yun-Ju FAN]][[Category:Yun-Ju FAN]] (1 collaborations)
 +
* [[:Category:Wei-Ting WANG|Wei-Ting WANG]][[Category:Wei-Ting WANG]] (1 collaborations)
 +
* [[:Category:Yi-Bo LIAO|Yi-Bo LIAO]][[Category:Yi-Bo LIAO]] (1 collaborations)
 +
* [[:Category:Yi-Hsun CHIU|Yi-Hsun CHIU]][[Category:Yi-Hsun CHIU]] (1 collaborations)
 +
* [[:Category:Hsiao-Han LIU|Hsiao-Han LIU]][[Category:Hsiao-Han LIU]] (1 collaborations)
 +
* [[:Category:Zhi-Chang LIN|Zhi-Chang LIN]][[Category:Zhi-Chang LIN]] (1 collaborations)
 
* [[:Category:Shih-Cheng CHEN|Shih-Cheng CHEN]][[Category:Shih-Cheng CHEN]] (1 collaborations)
 
* [[:Category:Shih-Cheng CHEN|Shih-Cheng CHEN]][[Category:Shih-Cheng CHEN]] (1 collaborations)
* [[:Category:Chun-Hsiung LIN|Chun-Hsiung LIN]][[Category:Chun-Hsiung LIN]] (1 collaborations)
+
* [[:Category:Chien Ning YAO|Chien Ning YAO]][[Category:Chien Ning YAO]] (1 collaborations)
* [[:Category:Li-Zhen YU|Li-Zhen YU]][[Category:Li-Zhen YU]] (1 collaborations)
+
* [[:Category:Kuo-Cheng CHING|Kuo-Cheng CHING]][[Category:Kuo-Cheng CHING]] (1 collaborations)
* [[:Category:Cheng-Chi CHUANG|Cheng-Chi CHUANG]][[Category:Cheng-Chi CHUANG]] (1 collaborations)
 
* [[:Category:Chun-Yuan CHEN|Chun-Yuan CHEN]][[Category:Chun-Yuan CHEN]] (1 collaborations)
 
* [[:Category:Huan-Chieh SU|Huan-Chieh SU]][[Category:Huan-Chieh SU]] (1 collaborations)
 
* [[:Category:Shang-Wen CHANG|Shang-Wen CHANG]][[Category:Shang-Wen CHANG]] (1 collaborations)
 
* [[:Category:Yi-Hsun CHIU|Yi-Hsun CHIU]][[Category:Yi-Hsun CHIU]] (1 collaborations)
 
* [[:Category:Shih-Chuan CHIU|Shih-Chuan CHIU]][[Category:Shih-Chuan CHIU]] (1 collaborations)
 
* [[:Category:Tien-Lu LIN|Tien-Lu LIN]][[Category:Tien-Lu LIN]] (1 collaborations)
 
* [[:Category:Jia-Chuan YOU|Jia-Chuan YOU]][[Category:Jia-Chuan YOU]] (1 collaborations)
 
* [[:Category:Kuan-Ting PAN|Kuan-Ting PAN]][[Category:Kuan-Ting PAN]] (1 collaborations)
 
* [[:Category:Shi-Ning JU|Shi-Ning JU]][[Category:Shi-Ning JU]] (1 collaborations)
 
  
 
[[Category:Chih-Hao WANG]]
 
[[Category:Chih-Hao WANG]]
 
[[Category:Inventors]]
 
[[Category:Inventors]]
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Co., Ltd.]]
+
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Company, Ltd.]]
[[Category:Inventors filing patents with TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.]]
+
[[Category:Inventors filing patents with TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]

Revision as of 01:52, 19 July 2024

Chih-Hao WANG

Executive Summary

Chih-Hao WANG is an inventor who has filed 34 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (21 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (19 patents), {using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate} (17 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (18 patents), TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (16 patents). Their most frequent collaborators include (19 collaborations), (10 collaborations), (9 collaborations).

Patent Filing Activity

Chih-Hao WANG Monthly Patent Applications.png

Technology Areas

Chih-Hao WANG Top Technology Areas.png

List of Technology Areas

  • H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 21 patents
  • H01L29/0673 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 19 patents
  • H01L29/66545 ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 17 patents
  • H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 16 patents
  • H01L21/823431 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 12 patents
  • H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
  • H01L29/66439 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 11 patents
  • H01L29/0847 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 9 patents
  • H01L21/823418 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 8 patents
  • H01L21/823412 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 7 patents
  • H01L21/823481 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 7 patents
  • H01L27/0886 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L29/66795 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L29/41791 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
  • H01L29/401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/0649 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/66742 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
  • H01L29/66553 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 4 patents
  • H01L21/823475 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 4 patents
  • H01L29/785 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L29/6653 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 4 patents
  • H01L21/823807 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
  • H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
  • H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L27/088 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L21/02603 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L21/823437 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 3 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L29/6656 ({using self aligned silicidation, i.e. salicide (formation of conductive layers comprising silicides): 3 patents
  • H01L21/76224 ({using trench refilling with dielectric materials (trench filling with polycristalline silicon): 3 patents
  • H01L21/28088 (Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups): 2 patents
  • H01L21/823878 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L21/823828 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L21/764 (Making of isolation regions between components): 2 patents
  • H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 2 patents
  • H01L29/78618 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L29/7853 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L29/7848 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L29/7851 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/823468 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 2 patents
  • H01L21/32139 ({using masks}): 2 patents
  • H01L21/76843 ({formed in openings in a dielectric}): 2 patents
  • H01L21/31105 ({Etching inorganic layers}): 2 patents
  • H01L21/823842 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/4908 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/41733 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/823857 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/28123 ({Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects}): 1 patents
  • H01L21/76829 ({characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}): 1 patents
  • H01L21/76897 ({Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step (self-aligned silicidation on field effect transistors): 1 patents
  • H01L21/823456 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L29/0653 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/0922 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/6681 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/45 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/02532 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/32134 ({by liquid etching only}): 1 patents
  • H01L29/66636 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/02164 ({the material being a silicon oxide, e.g. SiO): 1 patents
  • H01L21/31116 ({by dry-etching}): 1 patents
  • H01L21/28562 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L21/76816 ({Aspects relating to the layout of the pattern or to the size of vias or trenches (layout of the interconnections per se): 1 patents
  • H01L21/76852 ({the layer also covering the sidewalls of the conductive structure}): 1 patents
  • H01L21/76879 ({by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating (plating on semiconductors in general): 1 patents
  • H01L29/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/28575 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L21/30604 (Chemical or electrical treatment, e.g. electrolytic etching (to form insulating layers): 1 patents
  • H01L27/0928 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/823892 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
  • H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
  • H01L27/1108 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/1104 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/32137 ({of silicon-containing layers}): 1 patents
  • H01L27/11 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/7854 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/66787 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/0642 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • B82Y40/00 (Manufacture or treatment of nanostructures): 1 patents
  • H01L29/42376 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/7856 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L27/1207 ({combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits}): 1 patents
  • H01L21/8221 ({Three dimensional integrated circuits stacked in different levels}): 1 patents
  • H01L27/0924 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/4966 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/3086 ({characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment}): 1 patents
  • H01L21/823864 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L21/823821 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents

Companies

Chih-Hao WANG Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Company, Ltd.: 18 patents
  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.: 16 patents

Collaborators

Subcategories

This category has the following 3 subcategories, out of 3 total.

C

K

L