Samsung electronics co., ltd. (20250072005). SEMICONDUCTOR DEVICE: Difference between revisions
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[[Category:samsung electronics co., ltd.]] | [[Category:samsung electronics co., ltd.]] | ||
==Inventor(s)== | |||
[[:Category:Kilho Lee of Suwon-si (KR)|Kilho Lee of Suwon-si (KR)]][[Category:Kilho Lee of Suwon-si (KR)]] | |||
[[:Category:Yongjae Lee of Suwon-si (KR)|Yongjae Lee of Suwon-si (KR)]][[Category:Yongjae Lee of Suwon-si (KR)]] | |||
==SEMICONDUCTOR DEVICE== | |||
This abstract first appeared for US patent application 20250072005 titled 'SEMICONDUCTOR DEVICE | |||
==Original Abstract Submitted== | |||
provided is a semiconductor device including a logic region including a circuit, a first memory region controlled by the logic region and having a first storage capacity, the first memory region including a plurality of first memory cells, and a second memory region controlled by the logic region and having a second storage capacity greater than the first storage capacity, the second memory region including a plurality of second memory cells, wherein each of the plurality of first memory cells and each of the plurality of second memory cells includes a magnetic memory element, and wherein an operating speed of the first memory region is faster than an operating speed of the second memory region. | |||
[[Category:H10B61/00]] | |||
[[Category:B64D47/00]] | |||
[[Category:H01L25/065]] | |||
[[Category:H10B80/00]] | |||
[[Category:CPC_H10B61/00]] |
Latest revision as of 07:03, 17 March 2025
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
SEMICONDUCTOR DEVICE
This abstract first appeared for US patent application 20250072005 titled 'SEMICONDUCTOR DEVICE
Original Abstract Submitted
provided is a semiconductor device including a logic region including a circuit, a first memory region controlled by the logic region and having a first storage capacity, the first memory region including a plurality of first memory cells, and a second memory region controlled by the logic region and having a second storage capacity greater than the first storage capacity, the second memory region including a plurality of second memory cells, wherein each of the plurality of first memory cells and each of the plurality of second memory cells includes a magnetic memory element, and wherein an operating speed of the first memory region is faster than an operating speed of the second memory region.